Home
last modified time | relevance | path

Searched refs:grp (Results 1 – 25 of 198) sorted by relevance

12345678

/drivers/s390/net/
Dctcm_mpc.c332 struct mpc_group *grp; in ctc_mpc_alloc_channel() local
339 grp = priv->mpcg; in ctc_mpc_alloc_channel()
341 grp->allochanfunc = callback; in ctc_mpc_alloc_channel()
342 grp->port_num = port_num; in ctc_mpc_alloc_channel()
343 grp->port_persist = 1; in ctc_mpc_alloc_channel()
347 CTCM_FUNTAIL, dev->name, fsm_getstate_str(grp->fsm)); in ctc_mpc_alloc_channel()
349 switch (fsm_getstate(grp->fsm)) { in ctc_mpc_alloc_channel()
352 grp->alloc_called = 1; in ctc_mpc_alloc_channel()
361 grp->send_qllc_disc = 1; in ctc_mpc_alloc_channel()
364 fsm_deltimer(&grp->timer); in ctc_mpc_alloc_channel()
[all …]
/drivers/pinctrl/mvebu/
Dpinctrl-mvebu.c109 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp, in mvebu_pinctrl_find_setting_by_val() argument
114 for (n = 0; n < grp->num_settings; n++) { in mvebu_pinctrl_find_setting_by_val()
115 if (config == grp->settings[n].val) { in mvebu_pinctrl_find_setting_by_val()
117 grp->settings[n].variant)) in mvebu_pinctrl_find_setting_by_val()
118 return &grp->settings[n]; in mvebu_pinctrl_find_setting_by_val()
126 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp, in mvebu_pinctrl_find_setting_by_name() argument
131 for (n = 0; n < grp->num_settings; n++) { in mvebu_pinctrl_find_setting_by_name()
132 if (strcmp(name, grp->settings[n].name) == 0) { in mvebu_pinctrl_find_setting_by_name()
134 grp->settings[n].variant)) in mvebu_pinctrl_find_setting_by_name()
135 return &grp->settings[n]; in mvebu_pinctrl_find_setting_by_name()
[all …]
Dpinctrl-armada-37xx.c238 struct armada_37xx_pinctrl *info, int pin, int *grp) in armada_37xx_find_next_grp_by_pin() argument
240 while (*grp < info->ngroups) { in armada_37xx_find_next_grp_by_pin()
241 struct armada_37xx_pin_group *group = &info->groups[*grp]; in armada_37xx_find_next_grp_by_pin()
244 *grp = *grp + 1; in armada_37xx_find_next_grp_by_pin()
345 struct armada_37xx_pin_group *grp) in armada_37xx_pmx_set_by_name() argument
350 unsigned int mask = grp->reg_mask; in armada_37xx_pmx_set_by_name()
353 dev_dbg(dev, "enable function %s group %s\n", name, grp->name); in armada_37xx_pmx_set_by_name()
355 func = match_string(grp->funcs, NB_FUNCS, name); in armada_37xx_pmx_set_by_name()
359 val = grp->val[func]; in armada_37xx_pmx_set_by_name()
372 struct armada_37xx_pin_group *grp = &info->groups[group]; in armada_37xx_pmx_set() local
[all …]
/drivers/base/
Ddevres.c447 struct devres_group *grp; in remove_nodes() local
449 grp = node_to_group(node); in remove_nodes()
450 if (grp) { in remove_nodes()
452 grp->color = 0; in remove_nodes()
474 struct devres_group *grp; in remove_nodes() local
476 grp = node_to_group(node); in remove_nodes()
477 BUG_ON(!grp || list_empty(&grp->node[0].entry)); in remove_nodes()
479 grp->color++; in remove_nodes()
480 if (list_empty(&grp->node[1].entry)) in remove_nodes()
481 grp->color++; in remove_nodes()
[all …]
/drivers/infiniband/hw/hfi1/
Duser_exp_rcv.c19 u32 rcventry, struct tid_group *grp,
30 struct tid_group *grp, u16 count,
330 struct tid_group *grp = in hfi1_user_exp_rcv_setup() local
333 ret = program_rcvarray(fd, tidbuf, grp, in hfi1_user_exp_rcv_setup()
342 tid_group_add_tail(grp, &uctxt->tid_group_list); in hfi1_user_exp_rcv_setup()
348 tid_group_add_tail(grp, &uctxt->tid_full_list); in hfi1_user_exp_rcv_setup()
354 struct tid_group *grp, *ptr; in hfi1_user_exp_rcv_setup() local
364 grp = tid_group_pop(&uctxt->tid_group_list); in hfi1_user_exp_rcv_setup()
365 tid_group_add_tail(grp, &uctxt->tid_used_list); in hfi1_user_exp_rcv_setup()
373 list_for_each_entry_safe(grp, ptr, &uctxt->tid_used_list.list, in hfi1_user_exp_rcv_setup()
[all …]
Dexp_rcv.h105 static inline void tid_group_add_tail(struct tid_group *grp, in tid_group_add_tail() argument
108 list_add_tail(&grp->list, &set->list); in tid_group_add_tail()
112 static inline void tid_group_remove(struct tid_group *grp, in tid_group_remove() argument
115 list_del_init(&grp->list); in tid_group_remove()
129 struct tid_group *grp = in tid_group_pop() local
131 list_del_init(&grp->list); in tid_group_pop()
133 return grp; in tid_group_pop()
151 hfi1_tid_group_to_idx(struct hfi1_ctxtdata *rcd, struct tid_group *grp) in hfi1_tid_group_to_idx() argument
153 return grp - &rcd->groups[0]; in hfi1_tid_group_to_idx()
Dexp_rcv.c38 struct tid_group *grp; in hfi1_alloc_ctxt_rcv_groups() local
50 grp = &rcd->groups[i]; in hfi1_alloc_ctxt_rcv_groups()
51 grp->size = dd->rcv_entries.group_size; in hfi1_alloc_ctxt_rcv_groups()
52 grp->base = tidbase; in hfi1_alloc_ctxt_rcv_groups()
53 tid_group_add_tail(grp, &rcd->tid_group_list); in hfi1_alloc_ctxt_rcv_groups()
/drivers/net/wireless/marvell/libertas_tf/
Ddeb_defs.h49 #define LBTF_DEB_LL(grp, grpnam, fmt, args...) \ argument
50 do { if ((lbtf_debug & (grp)) == (grp)) \
53 #define LBTF_DEB_LL(grp, grpnam, fmt, args...) do {} while (0) argument
56 #define lbtf_deb_enter(grp) \ argument
57 LBTF_DEB_LL(grp | LBTF_DEB_ENTER, " enter", "%s()\n", __func__);
58 #define lbtf_deb_enter_args(grp, fmt, args...) \ argument
59 LBTF_DEB_LL(grp | LBTF_DEB_ENTER, " enter", "%s(" fmt ")\n", __func__, ## args);
60 #define lbtf_deb_leave(grp) \ argument
61 LBTF_DEB_LL(grp | LBTF_DEB_LEAVE, " leave", "%s()\n", __func__);
62 #define lbtf_deb_leave_args(grp, fmt, args...) \ argument
[all …]
/drivers/pinctrl/freescale/
Dpinctrl-imx.c40 const struct group_desc *grp = NULL; in imx_pinctrl_find_group_by_name() local
44 grp = pinctrl_generic_get_group(pctldev, i); in imx_pinctrl_find_group_by_name()
45 if (grp && !strcmp(grp->name, name)) in imx_pinctrl_find_group_by_name()
49 return grp; in imx_pinctrl_find_group_by_name()
64 const struct group_desc *grp; in imx_dt_node_to_map() local
75 grp = imx_pinctrl_find_group_by_name(pctldev, np->name); in imx_dt_node_to_map()
76 if (!grp) { in imx_dt_node_to_map()
82 map_num += grp->num_pins; in imx_dt_node_to_map()
84 for (i = 0; i < grp->num_pins; i++) { in imx_dt_node_to_map()
85 pin = &((struct imx_pin *)(grp->data))[i]; in imx_dt_node_to_map()
[all …]
Dpinctrl-imx1-core.c161 const struct imx1_pin_group *grp = NULL; in imx1_pinctrl_find_group_by_name() local
166 grp = &info->groups[i]; in imx1_pinctrl_find_group_by_name()
171 return grp; in imx1_pinctrl_find_group_by_name()
227 const struct imx1_pin_group *grp; in imx1_dt_node_to_map() local
237 grp = imx1_pinctrl_find_group_by_name(info, np->name); in imx1_dt_node_to_map()
238 if (!grp) { in imx1_dt_node_to_map()
244 for (i = 0; i < grp->npins; i++) in imx1_dt_node_to_map()
268 for (i = j = 0; i < grp->npins; i++) { in imx1_dt_node_to_map()
271 pin_get_name(pctldev, grp->pins[i].pin_id); in imx1_dt_node_to_map()
272 new_map[j].data.configs.configs = &grp->pins[i].config; in imx1_dt_node_to_map()
[all …]
/drivers/media/test-drivers/vivid/
Dvivid-rds-gen.c15 static u8 vivid_get_di(const struct vivid_rds_gen *rds, unsigned grp) in vivid_get_di() argument
17 switch (grp) { in vivid_get_di()
19 return (rds->dyn_pty << 2) | (grp & 3); in vivid_get_di()
21 return (rds->compressed << 2) | (grp & 3); in vivid_get_di()
23 return (rds->art_head << 2) | (grp & 3); in vivid_get_di()
25 return (rds->mono_stereo << 2) | (grp & 3); in vivid_get_di()
45 unsigned grp; in vivid_rds_generate() local
52 for (grp = 0; grp < VIVID_RDS_GEN_GROUPS; grp++, data += VIVID_RDS_GEN_BLKS_PER_GRP) { in vivid_rds_generate()
61 switch (grp) { in vivid_rds_generate()
65 idx = (grp % 22) % 4; in vivid_rds_generate()
[all …]
/drivers/crypto/marvell/octeontx/
Dotx_cptpf_ucode.c188 eng_grp->g->grp[eng_grp->mirror.idx].ucode[0].align_dma; in cpt_set_ucode_base()
524 eng_grp->g->grp[eng_grp->mirror.idx].ucode[0].ver_str, in print_ucode_info()
548 &eng_grp->g->grp[eng_grp->mirror.idx], in print_engs_info()
604 struct otx_cpt_eng_grp_info *grp; in print_dbg_info() local
616 grp = &eng_grps->grp[i]; in print_dbg_info()
617 pr_debug("engine_group%d, state %s\n", i, grp->is_enabled ? in print_dbg_info()
619 if (grp->is_enabled) { in print_dbg_info()
620 mirrored_grp = &eng_grps->grp[grp->mirror.idx]; in print_dbg_info()
622 grp->mirror.is_ena ? in print_dbg_info()
624 grp->ucode[0].filename, in print_dbg_info()
[all …]
Dotx_cptpf_mbox.c135 static int otx_cpt_bind_vq_to_grp(struct otx_cpt_device *cpt, u8 q, u8 grp) in otx_cpt_bind_vq_to_grp() argument
148 if (grp >= OTX_CPT_MAX_ENGINE_GROUPS) { in otx_cpt_bind_vq_to_grp()
150 grp, OTX_CPT_MAX_ENGINE_GROUPS); in otx_cpt_bind_vq_to_grp()
154 eng_grp = &cpt->eng_grps.grp[grp]; in otx_cpt_bind_vq_to_grp()
156 dev_err(dev, "Requested engine group %d is disabled\n", grp); in otx_cpt_bind_vq_to_grp()
161 pf_qx_ctl.s.grp = grp; in otx_cpt_bind_vq_to_grp()
165 ucode = &eng_grp->g->grp[eng_grp->mirror.idx].ucode[0]; in otx_cpt_bind_vq_to_grp()
/drivers/crypto/marvell/octeontx2/
Dotx2_cptpf_ucode.c554 struct otx2_cpt_eng_grp_info *grp) in release_engines() argument
559 if (!grp->engs[i].type) in release_engines()
562 if (grp->engs[i].count > 0) { in release_engines()
563 ret = update_engines_avail_count(dev, &grp->g->avail, in release_engines()
564 &grp->engs[i], in release_engines()
565 grp->engs[i].count); in release_engines()
570 grp->engs[i].type = 0; in release_engines()
571 grp->engs[i].count = 0; in release_engines()
572 grp->engs[i].offset = 0; in release_engines()
573 grp->engs[i].ucode = NULL; in release_engines()
[all …]
/drivers/pinctrl/renesas/
Dpinctrl-rzn1.c343 const struct rzn1_pin_group *grp; in rzn1_dt_node_to_map_one() local
352 grp = rzn1_pinctrl_find_group_by_name(ipctl, np->name); in rzn1_dt_node_to_map_one()
353 if (!grp) { in rzn1_dt_node_to_map_one()
379 grp->name, grp->func); in rzn1_dt_node_to_map_one()
386 &reserved_maps, num_maps, grp->name, in rzn1_dt_node_to_map_one()
394 grp->func, grp->name, grp->npins); in rzn1_dt_node_to_map_one()
468 struct rzn1_pin_group *grp = &ipctl->groups[group]; in rzn1_set_mux() local
469 unsigned int i, grp_pins = grp->npins; in rzn1_set_mux()
472 ipctl->functions[selector].name, selector, grp->name, group); in rzn1_set_mux()
476 rzn1_set_hw_pin_func(ipctl, grp->pins[i], grp->pin_ids[i], 0); in rzn1_set_mux()
[all …]
/drivers/pinctrl/sprd/
Dpinctrl-sprd.c197 const struct sprd_pin_group *grp = NULL; in sprd_pinctrl_find_group_by_name() local
202 grp = &info->groups[i]; in sprd_pinctrl_find_group_by_name()
207 return grp; in sprd_pinctrl_find_group_by_name()
250 const struct sprd_pin_group *grp; in sprd_dt_node_to_map() local
259 grp = sprd_pinctrl_find_group_by_name(pctl, np->name); in sprd_dt_node_to_map()
260 if (!grp) { in sprd_dt_node_to_map()
308 grp->name, function); in sprd_dt_node_to_map()
318 pin_id = grp->pins[0]; in sprd_dt_node_to_map()
321 group_or_pin = grp->name; in sprd_dt_node_to_map()
392 struct sprd_pin_group *grp = &info->groups[group_selector]; in sprd_pmx_set_mux() local
[all …]
/drivers/pinctrl/uniphier/
Dpinctrl-uniphier.h159 #define __UNIPHIER_PINCTRL_GROUP(grp, mux) \ argument
161 .name = #grp, \
162 .pins = grp##_pins, \
163 .num_pins = ARRAY_SIZE(grp##_pins), \
167 #define UNIPHIER_PINCTRL_GROUP(grp) \ argument
168 __UNIPHIER_PINCTRL_GROUP(grp, \
169 grp##_muxvals + \
170 BUILD_BUG_ON_ZERO(ARRAY_SIZE(grp##_pins) != \
171 ARRAY_SIZE(grp##_muxvals)))
173 #define UNIPHIER_PINCTRL_GROUP_GPIO(grp) \ argument
[all …]
/drivers/net/ethernet/microchip/sparx5/
Dsparx5_packet.c23 void sparx5_xtr_flush(struct sparx5 *sparx5, u8 grp) in sparx5_xtr_flush() argument
26 spx5_wr(QS_XTR_FLUSH_FLUSH_SET(BIT(grp)), sparx5, QS_XTR_FLUSH); in sparx5_xtr_flush()
55 static void sparx5_xtr_grp(struct sparx5 *sparx5, u8 grp, bool byte_swap) in sparx5_xtr_grp() argument
68 ifh[i] = spx5_rd(sparx5, QS_XTR_RD(grp)); in sparx5_xtr_grp()
78 sparx5_xtr_flush(sparx5, grp); in sparx5_xtr_grp()
86 sparx5_xtr_flush(sparx5, grp); in sparx5_xtr_grp()
95 u32 val = spx5_rd(sparx5, QS_XTR_RD(grp)); in sparx5_xtr_grp()
127 *rxbuf = spx5_rd(sparx5, QS_XTR_RD(grp)); in sparx5_xtr_grp()
167 int grp = INJ_QUEUE; in sparx5_inject() local
172 if (!(QS_INJ_STATUS_FIFO_RDY_GET(val) & BIT(grp))) { in sparx5_inject()
[all …]
/drivers/crypto/cavium/cpt/
Dcptpf_main.c27 u8 type, u8 grp) in cpt_disable_cores() argument
38 grpmask = cpt_read_csr64(cpt->reg_base, CPTX_PF_GX_EN(0, grp)); in cpt_disable_cores()
39 cpt_write_csr64(cpt->reg_base, CPTX_PF_GX_EN(0, grp), in cpt_disable_cores()
42 grp = cpt_read_csr64(cpt->reg_base, CPTX_PF_EXEC_BUSY(0)); in cpt_disable_cores()
43 while (grp & coremask) { in cpt_disable_cores()
45 grp = cpt_read_csr64(cpt->reg_base, in cpt_disable_cores()
77 static void cpt_configure_group(struct cpt_device *cpt, u8 grp, in cpt_configure_group() argument
85 pf_gx_en = cpt_read_csr64(cpt->reg_base, CPTX_PF_GX_EN(0, grp)); in cpt_configure_group()
86 cpt_write_csr64(cpt->reg_base, CPTX_PF_GX_EN(0, grp), in cpt_configure_group()
383 u32 grp, timeout = 100; in cpt_disable_all_cores() local
[all …]
/drivers/dma/
Dacpi-dma.c41 static int acpi_dma_parse_resource_group(const struct acpi_csrt_group *grp, in acpi_dma_parse_resource_group() argument
50 if (grp->shared_info_length != sizeof(struct acpi_csrt_shared_info)) in acpi_dma_parse_resource_group()
71 si = (const struct acpi_csrt_shared_info *)&grp[1]; in acpi_dma_parse_resource_group()
92 (char *)&grp->vendor_id, grp->device_id, grp->revision); in acpi_dma_parse_resource_group()
129 struct acpi_csrt_group *grp, *end; in acpi_dma_parse_csrt() local
142 grp = (struct acpi_csrt_group *)(csrt + 1); in acpi_dma_parse_csrt()
145 while (grp < end) { in acpi_dma_parse_csrt()
146 ret = acpi_dma_parse_resource_group(grp, adev, adma); in acpi_dma_parse_csrt()
153 grp = (struct acpi_csrt_group *)((void *)grp + grp->length); in acpi_dma_parse_csrt()
/drivers/net/ethernet/freescale/
Dgianfar.c505 struct gfar_priv_grp *grp = &priv->gfargrp[priv->num_grps]; in gfar_parse_group() local
509 grp->irqinfo[i] = kzalloc(sizeof(struct gfar_irqinfo), in gfar_parse_group()
511 if (!grp->irqinfo[i]) in gfar_parse_group()
515 grp->regs = of_iomap(np, 0); in gfar_parse_group()
516 if (!grp->regs) in gfar_parse_group()
519 gfar_irq(grp, TX)->irq = irq_of_parse_and_map(np, 0); in gfar_parse_group()
523 gfar_irq(grp, RX)->irq = irq_of_parse_and_map(np, 1); in gfar_parse_group()
524 gfar_irq(grp, ER)->irq = irq_of_parse_and_map(np, 2); in gfar_parse_group()
525 if (!gfar_irq(grp, TX)->irq || in gfar_parse_group()
526 !gfar_irq(grp, RX)->irq || in gfar_parse_group()
[all …]
/drivers/regulator/
Dtwl6030-regulator.c124 int grp = 0, val; in twl6030reg_is_enabled() local
127 grp = twlreg_grp(rdev); in twl6030reg_is_enabled()
128 if (grp < 0) in twl6030reg_is_enabled()
129 return grp; in twl6030reg_is_enabled()
130 grp &= P1_GRP_6030; in twl6030reg_is_enabled()
136 grp = 1; in twl6030reg_is_enabled()
139 return grp && (val == TWL6030_CFG_STATE_ON); in twl6030reg_is_enabled()
149 int grp = 0; in twl6030reg_enable() local
153 grp = twlreg_grp(rdev); in twl6030reg_enable()
154 if (grp < 0) in twl6030reg_enable()
[all …]
/drivers/pinctrl/nxp/
Dpinctrl-s32cc.c310 struct s32_pin_group *grp; in s32_pmx_set() local
316 grp = &info->groups[group]; in s32_pmx_set()
319 info->functions[selector].name, grp->data.name); in s32_pmx_set()
322 for (i = 0; i < grp->data.npins; i++) { in s32_pmx_set()
323 if (s32_check_pin(pctldev, grp->data.pins[i]) != 0) { in s32_pmx_set()
325 grp->data.pins[i], group); in s32_pmx_set()
330 for (i = 0, ret = 0; i < grp->data.npins && !ret; i++) { in s32_pmx_set()
331 ret = s32_regmap_update(pctldev, grp->data.pins[i], in s32_pmx_set()
332 S32_MSCR_SSS_MASK, grp->pin_sss[i]); in s32_pmx_set()
335 grp->data.pins[i]); in s32_pmx_set()
[all …]
/drivers/net/ethernet/mellanox/mlx5/core/
Den_stats.h81 #define MLX5E_STATS_GRP_OP(grp, name) mlx5e_stats_grp_ ## grp ## _ ## name argument
83 #define MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(grp) \ argument
84 int MLX5E_STATS_GRP_OP(grp, num_stats)(struct mlx5e_priv *priv)
86 #define MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(grp) \ argument
87 void MLX5E_STATS_GRP_OP(grp, update_stats)(struct mlx5e_priv *priv)
89 #define MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(grp) \ argument
90 int MLX5E_STATS_GRP_OP(grp, fill_strings)(struct mlx5e_priv *priv, u8 *data, int idx)
92 #define MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(grp) \ argument
93 int MLX5E_STATS_GRP_OP(grp, fill_stats)(struct mlx5e_priv *priv, u64 *data, int idx)
95 #define MLX5E_STATS_GRP(grp) mlx5e_stats_grp_ ## grp argument
[all …]
/drivers/net/ethernet/microchip/lan966x/
Dlan966x_main.c213 static int lan966x_port_inj_ready(struct lan966x *lan966x, u8 grp) in lan966x_port_inj_ready() argument
217 if (lan_rd(lan966x, QS_INJ_STATUS) & QS_INJ_STATUS_FIFO_RDY_SET(BIT(grp))) in lan966x_port_inj_ready()
221 QS_INJ_STATUS_FIFO_RDY_GET(val) & BIT(grp), in lan966x_port_inj_ready()
232 u8 grp = 0; in lan966x_port_ifh_xmit() local
237 if (!(QS_INJ_STATUS_FIFO_RDY_GET(val) & BIT(grp)) || in lan966x_port_ifh_xmit()
238 (QS_INJ_STATUS_WMARK_REACHED_GET(val) & BIT(grp))) in lan966x_port_ifh_xmit()
244 lan966x, QS_INJ_CTRL(grp)); in lan966x_port_ifh_xmit()
249 err = lan966x_port_inj_ready(lan966x, grp); in lan966x_port_ifh_xmit()
253 lan_wr((__force u32)ifh[i], lan966x, QS_INJ_WR(grp)); in lan966x_port_ifh_xmit()
261 err = lan966x_port_inj_ready(lan966x, grp); in lan966x_port_ifh_xmit()
[all …]

12345678