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Searched refs:hrt_address (Results 1 – 25 of 48) sorted by relevance

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/drivers/staging/media/atomisp/pci/
Dsystem_local.c19 const hrt_address ISP_CTRL_BASE[N_ISP_ID] = {
23 const hrt_address ISP_DMEM_BASE[N_ISP_ID] = {
27 const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = {
32 const hrt_address SP_CTRL_BASE[N_SP_ID] = {
36 const hrt_address SP_DMEM_BASE[N_SP_ID] = {
45 const hrt_address MMU_BASE[N_MMU_ID] = {
51 const hrt_address DMA_BASE[N_DMA_ID] = {
55 const hrt_address ISYS2401_DMA_BASE[N_ISYS2401_DMA_ID] = {
60 const hrt_address IRQ_BASE[N_IRQ_ID] = {
72 const hrt_address GDC_BASE[N_GDC_ID] = {
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Dsystem_local.h34 #define GP_FIFO_BASE ((hrt_address)0x0000000000090104) /* This is NOT a base address */
37 extern const hrt_address ISP_CTRL_BASE[N_ISP_ID];
38 extern const hrt_address ISP_DMEM_BASE[N_ISP_ID];
39 extern const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID];
42 extern const hrt_address SP_CTRL_BASE[N_SP_ID];
43 extern const hrt_address SP_DMEM_BASE[N_SP_ID];
47 extern const hrt_address MMU_BASE[N_MMU_ID];
50 extern const hrt_address DMA_BASE[N_DMA_ID];
51 extern const hrt_address ISYS2401_DMA_BASE[N_ISYS2401_DMA_ID];
54 extern const hrt_address IRQ_BASE[N_IRQ_ID];
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Disp2400_input_system_private.h27 const hrt_address reg, in input_system_reg_store()
31 assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); in input_system_reg_store()
39 const hrt_address reg) in input_system_reg_load()
42 assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); in input_system_reg_load()
49 const hrt_address reg, in receiver_reg_store()
53 assert(RX_BASE[ID] != (hrt_address)-1); in receiver_reg_store()
60 const hrt_address reg) in receiver_reg_load()
63 assert(RX_BASE[ID] != (hrt_address)-1); in receiver_reg_load()
70 const hrt_address reg, in receiver_port_reg_store()
75 assert(RX_BASE[ID] != (hrt_address)-1); in receiver_port_reg_store()
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Dia_css_device_access.h31 ia_css_device_load_uint8(const hrt_address addr);
34 ia_css_device_load_uint16(const hrt_address addr);
37 ia_css_device_load_uint32(const hrt_address addr);
40 ia_css_device_load_uint64(const hrt_address addr);
43 ia_css_device_store_uint8(const hrt_address addr, const uint8_t data);
46 ia_css_device_store_uint16(const hrt_address addr, const uint16_t data);
49 ia_css_device_store_uint32(const hrt_address addr, const uint32_t data);
52 ia_css_device_store_uint64(const hrt_address addr, const uint64_t data);
55 ia_css_device_load(const hrt_address addr, void *data, const size_t size);
58 ia_css_device_store(const hrt_address addr, const void *data,
Dia_css_device_access.c33 ia_css_device_load_uint8(const hrt_address addr) in ia_css_device_load_uint8()
39 ia_css_device_load_uint16(const hrt_address addr) in ia_css_device_load_uint16()
45 ia_css_device_load_uint32(const hrt_address addr) in ia_css_device_load_uint32()
51 ia_css_device_load_uint64(const hrt_address addr) in ia_css_device_load_uint64()
60 ia_css_device_store_uint8(const hrt_address addr, const uint8_t data) in ia_css_device_store_uint8()
66 ia_css_device_store_uint16(const hrt_address addr, const uint16_t data) in ia_css_device_store_uint16()
72 ia_css_device_store_uint32(const hrt_address addr, const uint32_t data) in ia_css_device_store_uint32()
78 ia_css_device_store_uint64(const hrt_address addr, const uint64_t data) in ia_css_device_store_uint64()
87 ia_css_device_load(const hrt_address addr, void *data, const size_t size) in ia_css_device_load()
93 ia_css_device_store(const hrt_address addr, const void *data, const size_t size) in ia_css_device_store()
Dia_css_env.h52 void (*store_8)(hrt_address addr, uint8_t data);
55 void (*store_16)(hrt_address addr, uint16_t data);
58 void (*store_32)(hrt_address addr, uint32_t data);
61 uint8_t (*load_8)(hrt_address addr);
64 uint16_t (*load_16)(hrt_address addr);
67 uint32_t (*load_32)(hrt_address addr);
70 void (*store)(hrt_address addr, const void *data, uint32_t bytes);
72 void (*load)(hrt_address addr, void *data, uint32_t bytes);
Disp2400_input_system_public.h148 const hrt_address reg,
161 const hrt_address reg);
173 const hrt_address reg,
186 const hrt_address reg);
200 const hrt_address reg,
215 const hrt_address reg);
229 const hrt_address reg,
244 const hrt_address reg);
Disp2401_input_system_private.h28 const hrt_address reg) in ibuf_ctrl_reg_load()
31 assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1); in ibuf_ctrl_reg_load()
37 const hrt_address reg, in ibuf_ctrl_reg_store()
41 assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1); in ibuf_ctrl_reg_store()
51 hrt_address reg_bank_offset; in ibuf_ctrl_get_proc_state()
/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/
Dsp_private.h27 const hrt_address reg, in sp_ctrl_store()
31 assert(SP_CTRL_BASE[ID] != (hrt_address)-1); in sp_ctrl_store()
38 const hrt_address reg) in sp_ctrl_load()
41 assert(SP_CTRL_BASE[ID] != (hrt_address)-1); in sp_ctrl_load()
47 const hrt_address reg, in sp_ctrl_getbit()
57 const hrt_address reg, in sp_ctrl_setbit()
68 const hrt_address reg, in sp_ctrl_clearbit()
79 hrt_address addr, in sp_dmem_store()
84 assert(SP_DMEM_BASE[ID] != (hrt_address)-1); in sp_dmem_store()
91 const hrt_address addr, in sp_dmem_load()
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Dtimed_ctrl.c29 hrt_address addr, in timed_ctrl_snd_commnd()
33 OP___assert(TIMED_CTRL_BASE[ID] != (hrt_address)-1); in timed_ctrl_snd_commnd()
51 hrt_address offset, in timed_ctrl_snd_sp_commnd()
55 OP___assert(SP_DMEM_BASE[SP_ID] != (hrt_address)-1); in timed_ctrl_snd_sp_commnd()
67 hrt_address offset, in timed_ctrl_snd_gpio_commnd()
71 OP___assert(GPIO_BASE[GPIO_ID] != (hrt_address)-1); in timed_ctrl_snd_gpio_commnd()
Devent_fifo_private.h30 assert(event_source_addr[ID] != ((hrt_address) - 1)); in event_wait_for()
46 assert(event_source_addr[ID] != ((hrt_address) - 1)); in event_receive_token()
54 assert(event_sink_addr[ID] != ((hrt_address) - 1)); in event_send_token()
63 assert(event_source_query_addr[ID] != ((hrt_address) - 1)); in is_event_pending()
73 assert(event_sink_query_addr[ID] != ((hrt_address) - 1)); in can_event_send_token()
Devent_fifo_local.h35 static const hrt_address event_source_addr[N_EVENT_ID] = {
42 static const hrt_address event_source_query_addr[N_EVENT_ID] = {
49 static const hrt_address event_sink_addr[N_EVENT_ID] = {
56 static const hrt_address event_sink_query_addr[N_EVENT_ID] = {
Disp_private.h36 assert(ISP_CTRL_BASE[ID] != (hrt_address) - 1); in isp_ctrl_store()
50 assert(ISP_CTRL_BASE[ID] != (hrt_address) - 1); in isp_ctrl_load()
97 assert(ISP_DMEM_BASE[ID] != (hrt_address) - 1); in isp_dmem_store()
113 assert(ISP_DMEM_BASE[ID] != (hrt_address) - 1); in isp_dmem_load()
128 assert(ISP_DMEM_BASE[ID] != (hrt_address) - 1); in isp_dmem_store_uint32()
143 assert(ISP_DMEM_BASE[ID] != (hrt_address) - 1); in isp_dmem_load_uint32()
Ddebug.c30 hrt_address debug_buffer_address = (hrt_address) - 1;
36 void debug_buffer_init(const hrt_address addr) in debug_buffer_init()
68 assert(debug_buffer_address != ((hrt_address)-1)); in debug_buffer_setmode()
Dfifo_monitor_private.h38 assert(FIFO_MONITOR_BASE[ID] != (hrt_address) - 1); in fifo_switch_set()
52 assert(FIFO_MONITOR_BASE[ID] != (hrt_address) - 1); in fifo_switch_get()
65 assert(FIFO_MONITOR_BASE[ID] != (hrt_address) - 1); in fifo_monitor_reg_store()
76 assert(FIFO_MONITOR_BASE[ID] != (hrt_address) - 1); in fifo_monitor_reg_load()
Dgp_device_private.h31 assert(GP_DEVICE_BASE[ID] != (hrt_address) - 1); in gp_device_reg_store()
39 const hrt_address reg_addr) in gp_device_reg_load()
42 assert(GP_DEVICE_BASE[ID] != (hrt_address)-1); in gp_device_reg_load()
Dinput_formatter_private.h27 const hrt_address reg_addr, in input_formatter_reg_store()
31 assert(INPUT_FORMATTER_BASE[ID] != (hrt_address)-1); in input_formatter_reg_store()
42 assert(INPUT_FORMATTER_BASE[ID] != (hrt_address)-1); in input_formatter_reg_load()
/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/
Dsp_public.h59 const hrt_address reg,
72 const hrt_address reg);
84 const hrt_address reg,
97 const hrt_address reg,
110 const hrt_address reg,
124 hrt_address addr,
139 const hrt_address addr,
154 hrt_address addr,
168 hrt_address addr,
182 hrt_address addr,
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Dcsi_rx_public.h95 const hrt_address reg);
107 const hrt_address reg,
120 const hrt_address reg);
132 const hrt_address reg,
Dtimed_ctrl_public.h39 hrt_address addr,
48 hrt_address offset,
57 hrt_address offset,
Dpixelgen_public.h63 const hrt_address reg);
75 const hrt_address reg,
Ddebug_public.h46 extern hrt_address debug_buffer_address;
84 const hrt_address addr);
/drivers/staging/media/atomisp/pci/hive_isp_css_include/device_access/
Ddevice_access.h54 typedef hrt_address sys_address;
79 const hrt_address addr);
88 const hrt_address addr);
97 const hrt_address addr);
106 const hrt_address addr);
116 const hrt_address addr,
127 const hrt_address addr,
138 const hrt_address addr,
149 const hrt_address addr,
161 const hrt_address addr,
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/drivers/staging/media/atomisp/pci/css_2401_system/host/
Dcsi_rx_private.h39 const hrt_address reg) in csi_rx_fe_ctrl_reg_load()
42 assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); in csi_rx_fe_ctrl_reg_load()
53 const hrt_address reg, in csi_rx_fe_ctrl_reg_store()
57 assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); in csi_rx_fe_ctrl_reg_store()
69 const hrt_address reg) in csi_rx_be_ctrl_reg_load()
72 assert(CSI_RX_BE_CTRL_BASE[ID] != (hrt_address)-1); in csi_rx_be_ctrl_reg_load()
83 const hrt_address reg, in csi_rx_be_ctrl_reg_store()
87 assert(CSI_RX_BE_CTRL_BASE[ID] != (hrt_address)-1); in csi_rx_be_ctrl_reg_store()
Dpixelgen_private.h34 const hrt_address reg) in pixelgen_ctrl_reg_load()
37 assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address) - 1); in pixelgen_ctrl_reg_load()
48 const hrt_address reg, in pixelgen_ctrl_reg_store()
52 assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address)-1); in pixelgen_ctrl_reg_store()

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