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/drivers/media/platform/qcom/venus/
Dvdec.c117 find_format(struct venus_inst *inst, u32 pixfmt, u32 type) in find_format() argument
132 !venus_helper_check_codec(inst, fmt[i].pixfmt)) in find_format()
136 !venus_helper_check_format(inst, fmt[i].pixfmt)) in find_format()
140 !(inst->bit_depth == VIDC_BITDEPTH_10)) in find_format()
147 find_format_by_index(struct venus_inst *inst, unsigned int index, u32 type) in find_format_by_index() argument
163 valid = venus_helper_check_codec(inst, fmt[i].pixfmt); in find_format_by_index()
165 valid = venus_helper_check_format(inst, fmt[i].pixfmt); in find_format_by_index()
168 !(inst->bit_depth == VIDC_BITDEPTH_10)) in find_format_by_index()
185 vdec_try_fmt_common(struct venus_inst *inst, struct v4l2_format *f) in vdec_try_fmt_common() argument
195 fmt = find_format(inst, pixmp->pixelformat, f->type); in vdec_try_fmt_common()
[all …]
Dvenc.c68 find_format(struct venus_inst *inst, u32 pixfmt, u32 type) in find_format() argument
83 !venus_helper_check_codec(inst, fmt[i].pixfmt)) in find_format()
90 find_format_by_index(struct venus_inst *inst, unsigned int index, u32 type) in find_format_by_index() argument
105 venus_helper_check_codec(inst, fmt[i].pixfmt); in find_format_by_index()
156 struct venus_inst *inst = to_inst(file); in venc_enum_fmt() local
159 fmt = find_format_by_index(inst, f->index, f->type); in venc_enum_fmt()
172 venc_try_fmt_common(struct venus_inst *inst, struct v4l2_format *f) in venc_try_fmt_common() argument
182 fmt = find_format(inst, pixmp->pixelformat, f->type); in venc_try_fmt_common()
190 fmt = find_format(inst, pixmp->pixelformat, f->type); in venc_try_fmt_common()
195 pixmp->width = clamp(pixmp->width, frame_width_min(inst), in venc_try_fmt_common()
[all …]
Dhfi.c164 static int wait_session_msg(struct venus_inst *inst) in wait_session_msg() argument
168 ret = wait_for_completion_timeout(&inst->done, TIMEOUT); in wait_session_msg()
172 if (inst->error != HFI_ERR_NONE) in wait_session_msg()
178 int hfi_session_create(struct venus_inst *inst, const struct hfi_inst_ops *ops) in hfi_session_create() argument
180 struct venus_core *core = inst->core; in hfi_session_create()
187 inst->state = INST_UNINIT; in hfi_session_create()
188 init_completion(&inst->done); in hfi_session_create()
189 inst->ops = ops; in hfi_session_create()
193 if (test_bit(0, &inst->core->sys_error)) { in hfi_session_create()
203 list_add_tail(&inst->list, &core->instances); in hfi_session_create()
[all …]
Dhelpers.c41 bool venus_helper_check_codec(struct venus_inst *inst, u32 v4l2_pixfmt) in venus_helper_check_codec() argument
43 struct venus_core *core = inst->core; in venus_helper_check_codec()
44 u32 session_type = inst->session_type; in venus_helper_check_codec()
93 static void free_dpb_buf(struct venus_inst *inst, struct intbuf *buf) in free_dpb_buf() argument
95 ida_free(&inst->dpb_ids, buf->dpb_out_tag); in free_dpb_buf()
98 dma_free_attrs(inst->core->dev, buf->size, buf->va, buf->da, in free_dpb_buf()
103 int venus_helper_queue_dpb_bufs(struct venus_inst *inst) in venus_helper_queue_dpb_bufs() argument
109 if (inst->dpb_buftype == HFI_BUFFER_OUTPUT) in venus_helper_queue_dpb_bufs()
110 dpb_size = inst->output_buf_size; in venus_helper_queue_dpb_bufs()
111 else if (inst->dpb_buftype == HFI_BUFFER_OUTPUT2) in venus_helper_queue_dpb_bufs()
[all …]
Dvenc_ctrls.c72 struct venus_inst *inst = ctrl_to_inst(ctrl); in venc_op_s_ctrl() local
73 struct venc_controls *ctr = &inst->controls.enc; in venc_op_s_ctrl()
88 mutex_lock(&inst->lock); in venc_op_s_ctrl()
89 if (inst->streamon_out && inst->streamon_cap) { in venc_op_s_ctrl()
94 ret = hfi_session_set_property(inst, ptype, &brate); in venc_op_s_ctrl()
96 mutex_unlock(&inst->lock); in venc_op_s_ctrl()
100 mutex_unlock(&inst->lock); in venc_op_s_ctrl()
215 mutex_lock(&inst->lock); in venc_op_s_ctrl()
216 if (inst->streamon_out && inst->streamon_cap) { in venc_op_s_ctrl()
222 ret = hfi_session_set_property(inst, ptype, &en); in venc_op_s_ctrl()
[all …]
/drivers/media/platform/mediatek/vcodec/decoder/vdec/
Dvdec_vp9_if.c206 static bool vp9_is_sf_ref_fb(struct vdec_vp9_inst *inst, struct vdec_fb *fb) in vp9_is_sf_ref_fb() argument
209 struct vdec_vp9_vsi *vsi = inst->vsi; in vp9_is_sf_ref_fb()
219 *inst, void *addr) in vp9_rm_from_fb_use_list()
224 list_for_each_entry(node, &inst->fb_use_list, list) { in vp9_rm_from_fb_use_list()
228 &inst->available_fb_node_list); in vp9_rm_from_fb_use_list()
236 static void vp9_add_to_fb_free_list(struct vdec_vp9_inst *inst, in vp9_add_to_fb_free_list() argument
242 node = list_first_entry_or_null(&inst->available_fb_node_list, in vp9_add_to_fb_free_list()
247 list_move_tail(&node->list, &inst->fb_free_list); in vp9_add_to_fb_free_list()
250 mtk_vdec_debug(inst->ctx, "No free fb node"); in vp9_add_to_fb_free_list()
262 static void vp9_ref_cnt_fb(struct vdec_vp9_inst *inst, int *idx, in vp9_ref_cnt_fb() argument
[all …]
Dvdec_h264_req_multi_if.c173 static int vdec_h264_slice_fill_decode_parameters(struct vdec_h264_slice_inst *inst, in vdec_h264_slice_fill_decode_parameters() argument
176 struct vdec_h264_slice_lat_dec_param *slice_param = &inst->vsi->h264_slice_params; in vdec_h264_slice_fill_decode_parameters()
183 mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_DECODE_PARAMS); in vdec_h264_slice_fill_decode_parameters()
188 mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_SCALING_MATRIX); in vdec_h264_slice_fill_decode_parameters()
192 sps = mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_SPS); in vdec_h264_slice_fill_decode_parameters()
196 pps = mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_PPS); in vdec_h264_slice_fill_decode_parameters()
201 mtk_vdec_err(inst->ctx, "No support for H.264 field decoding."); in vdec_h264_slice_fill_decode_parameters()
202 inst->is_field_bitstream = true; in vdec_h264_slice_fill_decode_parameters()
216 static int get_vdec_sig_decode_parameters(struct vdec_h264_slice_inst *inst) in get_vdec_sig_decode_parameters() argument
222 struct vdec_h264_slice_lat_dec_param *slice_param = &inst->h264_slice_param; in get_vdec_sig_decode_parameters()
[all …]
Dvdec_vp8_req_if.c118 static void vdec_vp8_slice_get_pic_info(struct vdec_vp8_slice_inst *inst) in vdec_vp8_slice_get_pic_info() argument
120 struct mtk_vcodec_dec_ctx *ctx = inst->ctx; in vdec_vp8_slice_get_pic_info()
126 vpu_dec_get_param(&inst->vpu, data, 3, GET_PARAM_PIC_INFO); in vdec_vp8_slice_get_pic_info()
130 ctx->picinfo.fb_sz[0] = inst->vpu.fb_sz[0]; in vdec_vp8_slice_get_pic_info()
131 ctx->picinfo.fb_sz[1] = inst->vpu.fb_sz[1]; in vdec_vp8_slice_get_pic_info()
133 inst->vsi->pic.pic_w = ctx->picinfo.pic_w; in vdec_vp8_slice_get_pic_info()
134 inst->vsi->pic.pic_h = ctx->picinfo.pic_h; in vdec_vp8_slice_get_pic_info()
135 inst->vsi->pic.buf_w = ctx->picinfo.buf_w; in vdec_vp8_slice_get_pic_info()
136 inst->vsi->pic.buf_h = ctx->picinfo.buf_h; in vdec_vp8_slice_get_pic_info()
137 inst->vsi->pic.fb_sz[0] = ctx->picinfo.fb_sz[0]; in vdec_vp8_slice_get_pic_info()
[all …]
Dvdec_vp8_if.c165 static void get_hw_reg_base(struct vdec_vp8_inst *inst) in get_hw_reg_base() argument
167 void __iomem **reg_base = inst->ctx->dev->reg_base; in get_hw_reg_base()
169 inst->reg_base.top = mtk_vcodec_get_reg_addr(reg_base, VDEC_TOP); in get_hw_reg_base()
170 inst->reg_base.cm = mtk_vcodec_get_reg_addr(reg_base, VDEC_CM); in get_hw_reg_base()
171 inst->reg_base.hwd = mtk_vcodec_get_reg_addr(reg_base, VDEC_HWD); in get_hw_reg_base()
172 inst->reg_base.misc = mtk_vcodec_get_reg_addr(reg_base, VDEC_MISC); in get_hw_reg_base()
173 inst->reg_base.ld = mtk_vcodec_get_reg_addr(reg_base, VDEC_LD); in get_hw_reg_base()
174 inst->reg_base.hwb = mtk_vcodec_get_reg_addr(reg_base, VDEC_HWB); in get_hw_reg_base()
177 static void write_hw_segmentation_data(struct vdec_vp8_inst *inst) in write_hw_segmentation_data() argument
182 void __iomem *cm = inst->reg_base.cm; in write_hw_segmentation_data()
[all …]
Dvdec_h264_req_if.c96 static int get_vdec_decode_parameters(struct vdec_h264_slice_inst *inst) in get_vdec_decode_parameters() argument
102 struct mtk_h264_dec_slice_param *slice_param = &inst->h264_slice_param; in get_vdec_decode_parameters()
112 mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_DECODE_PARAMS); in get_vdec_decode_parameters()
116 sps = mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_SPS); in get_vdec_decode_parameters()
120 pps = mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_PPS); in get_vdec_decode_parameters()
125 mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_SCALING_MATRIX); in get_vdec_decode_parameters()
129 mtk_vdec_h264_update_dpb(dec_params, inst->dpb); in get_vdec_decode_parameters()
135 dec_params, inst->dpb); in get_vdec_decode_parameters()
136 mtk_vdec_h264_fill_dpb_info(inst->ctx, &slice_param->decode_params, in get_vdec_decode_parameters()
141 inst->dpb); in get_vdec_decode_parameters()
[all …]
Dvdec_h264_if.c139 static int allocate_predication_buf(struct vdec_h264_inst *inst) in allocate_predication_buf() argument
143 inst->pred_buf.size = BUF_PREDICTION_SZ; in allocate_predication_buf()
144 err = mtk_vcodec_mem_alloc(inst->ctx, &inst->pred_buf); in allocate_predication_buf()
146 mtk_vdec_err(inst->ctx, "failed to allocate ppl buf"); in allocate_predication_buf()
150 inst->vsi->pred_buf_dma = inst->pred_buf.dma_addr; in allocate_predication_buf()
154 static void free_predication_buf(struct vdec_h264_inst *inst) in free_predication_buf() argument
158 inst->vsi->pred_buf_dma = 0; in free_predication_buf()
159 mem = &inst->pred_buf; in free_predication_buf()
161 mtk_vcodec_mem_free(inst->ctx, mem); in free_predication_buf()
164 static int alloc_mv_buf(struct vdec_h264_inst *inst, struct vdec_pic_info *pic) in alloc_mv_buf() argument
[all …]
Dvdec_hevc_req_multi_if.c588 static int vdec_hevc_slice_fill_decode_parameters(struct vdec_hevc_slice_inst *inst, in vdec_hevc_slice_fill_decode_parameters() argument
591 struct vdec_hevc_slice_lat_dec_param *slice_param = &inst->vsi->hevc_slice_params; in vdec_hevc_slice_fill_decode_parameters()
598 vdec_hevc_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_HEVC_DECODE_PARAMS); in vdec_hevc_slice_fill_decode_parameters()
603 vdec_hevc_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_HEVC_SCALING_MATRIX); in vdec_hevc_slice_fill_decode_parameters()
607 sps = vdec_hevc_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_HEVC_SPS); in vdec_hevc_slice_fill_decode_parameters()
611 pps = vdec_hevc_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_HEVC_PPS); in vdec_hevc_slice_fill_decode_parameters()
631 static void vdec_hevc_slice_fill_decode_reflist(struct vdec_hevc_slice_inst *inst, in vdec_hevc_slice_fill_decode_reflist() argument
640 vdec_hevc_fill_dpb_info(inst->ctx, &slice_param->decode_params, in vdec_hevc_slice_fill_decode_reflist()
644 static int vdec_hevc_slice_alloc_mv_buf(struct vdec_hevc_slice_inst *inst, in vdec_hevc_slice_alloc_mv_buf() argument
651 mtk_v4l2_vdec_dbg(3, inst->ctx, "allocate mv buffer size = 0x%x", buf_sz); in vdec_hevc_slice_alloc_mv_buf()
[all …]
/drivers/media/platform/mediatek/vcodec/encoder/venc/
Dvenc_h264_if.c226 static inline u32 h264_read_reg(struct venc_h264_inst *inst, u32 addr) in h264_read_reg() argument
228 return readl(inst->hw_base + addr); in h264_read_reg()
231 static unsigned int h264_get_profile(struct venc_h264_inst *inst, in h264_get_profile() argument
242 mtk_venc_err(inst->ctx, "unsupported CONSTRAINED_BASELINE"); in h264_get_profile()
245 mtk_venc_err(inst->ctx, "unsupported EXTENDED"); in h264_get_profile()
248 mtk_venc_debug(inst->ctx, "unsupported profile %d", profile); in h264_get_profile()
253 static unsigned int h264_get_level(struct venc_h264_inst *inst, in h264_get_level() argument
258 mtk_venc_err(inst->ctx, "unsupported 1B"); in h264_get_level()
291 mtk_venc_debug(inst->ctx, "unsupported level %d", level); in h264_get_level()
296 static void h264_enc_free_work_buf(struct venc_h264_inst *inst) in h264_enc_free_work_buf() argument
[all …]
Dvenc_vp8_if.c134 static inline u32 vp8_enc_read_reg(struct venc_vp8_inst *inst, u32 addr) in vp8_enc_read_reg() argument
136 return readl(inst->hw_base + addr); in vp8_enc_read_reg()
139 static void vp8_enc_free_work_buf(struct venc_vp8_inst *inst) in vp8_enc_free_work_buf() argument
145 if (inst->work_bufs[i].size == 0) in vp8_enc_free_work_buf()
147 mtk_vcodec_mem_free(inst->ctx, &inst->work_bufs[i]); in vp8_enc_free_work_buf()
151 static int vp8_enc_alloc_work_buf(struct venc_vp8_inst *inst) in vp8_enc_alloc_work_buf() argument
155 struct venc_vp8_vpu_buf *wb = inst->vsi->work_bufs; in vp8_enc_alloc_work_buf()
170 inst->work_bufs[i].size = wb[i].size; in vp8_enc_alloc_work_buf()
171 ret = mtk_vcodec_mem_alloc(inst->ctx, &inst->work_bufs[i]); in vp8_enc_alloc_work_buf()
173 mtk_venc_err(inst->ctx, "cannot alloc work_bufs[%d]", i); in vp8_enc_alloc_work_buf()
[all …]
/drivers/media/platform/amphion/
Dvdec.c194 struct vpu_inst *inst = ctrl_to_inst(ctrl); in vdec_op_s_ctrl() local
195 struct vdec_t *vdec = inst->priv; in vdec_op_s_ctrl()
218 static int vdec_ctrl_init(struct vpu_inst *inst) in vdec_ctrl_init() argument
223 ret = v4l2_ctrl_handler_init(&inst->ctrl_handler, 20); in vdec_ctrl_init()
227 v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops, in vdec_ctrl_init()
231 v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops, in vdec_ctrl_init()
235 ctrl = v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops, in vdec_ctrl_init()
240 ctrl = v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops, in vdec_ctrl_init()
245 if (inst->ctrl_handler.error) { in vdec_ctrl_init()
246 ret = inst->ctrl_handler.error; in vdec_ctrl_init()
[all …]
Dvpu_cmds.c81 static struct vpu_cmd_t *vpu_alloc_cmd(struct vpu_inst *inst, u32 id, void *data) in vpu_alloc_cmd() argument
98 ret = vpu_iface_pack_cmd(inst->core, cmd->pkt, inst->id, id, data); in vpu_alloc_cmd()
100 dev_err(inst->dev, "iface pack cmd %s fail\n", vpu_id_name(id)); in vpu_alloc_cmd()
125 static int vpu_session_process_cmd(struct vpu_inst *inst, struct vpu_cmd_t *cmd) in vpu_session_process_cmd() argument
129 dev_dbg(inst->dev, "[%d]send cmd %s\n", inst->id, vpu_id_name(cmd->id)); in vpu_session_process_cmd()
130 vpu_iface_pre_send_cmd(inst); in vpu_session_process_cmd()
131 ret = vpu_cmd_send(inst->core, cmd->pkt); in vpu_session_process_cmd()
133 vpu_iface_post_send_cmd(inst); in vpu_session_process_cmd()
134 vpu_inst_record_flow(inst, cmd->id); in vpu_session_process_cmd()
136 dev_err(inst->dev, "[%d] iface send cmd %s fail\n", inst->id, vpu_id_name(cmd->id)); in vpu_session_process_cmd()
[all …]
Dvpu_v4l2.c27 void vpu_inst_lock(struct vpu_inst *inst) in vpu_inst_lock() argument
29 mutex_lock(&inst->lock); in vpu_inst_lock()
32 void vpu_inst_unlock(struct vpu_inst *inst) in vpu_inst_unlock() argument
34 mutex_unlock(&inst->lock); in vpu_inst_unlock()
73 void vpu_v4l2_set_error(struct vpu_inst *inst) in vpu_v4l2_set_error() argument
75 vpu_inst_lock(inst); in vpu_v4l2_set_error()
76 dev_err(inst->dev, "some error occurs in codec\n"); in vpu_v4l2_set_error()
77 if (inst->fh.m2m_ctx) { in vpu_v4l2_set_error()
78 vb2_queue_error(v4l2_m2m_get_src_vq(inst->fh.m2m_ctx)); in vpu_v4l2_set_error()
79 vb2_queue_error(v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx)); in vpu_v4l2_set_error()
[all …]
Dvpu_msgs.c25 void (*done)(struct vpu_inst *inst, struct vpu_rpc_event *pkt);
29 static void vpu_session_handle_start_done(struct vpu_inst *inst, struct vpu_rpc_event *pkt) in vpu_session_handle_start_done() argument
31 vpu_trace(inst->dev, "[%d]\n", inst->id); in vpu_session_handle_start_done()
34 static void vpu_session_handle_mem_request(struct vpu_inst *inst, struct vpu_rpc_event *pkt) in vpu_session_handle_mem_request() argument
38 vpu_iface_unpack_msg_data(inst->core, pkt, (void *)&req_data); in vpu_session_handle_mem_request()
39 vpu_trace(inst->dev, "[%d] %d:%d %d:%d %d:%d\n", in vpu_session_handle_mem_request()
40 inst->id, in vpu_session_handle_mem_request()
47 vpu_inst_lock(inst); in vpu_session_handle_mem_request()
48 call_void_vop(inst, mem_request, in vpu_session_handle_mem_request()
55 vpu_inst_unlock(inst); in vpu_session_handle_mem_request()
[all …]
/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_mpc.h34 #define MPC_REG_LIST_DCN3_2(inst) \ argument
35 MPC_REG_LIST_DCN3_0(inst),\
36 SRII(MPCC_MOVABLE_CM_LOCATION_CONTROL, MPCC, inst),\
37 SRII(MPCC_MCM_SHAPER_CONTROL, MPCC_MCM, inst),\
38 SRII(MPCC_MCM_SHAPER_OFFSET_R, MPCC_MCM, inst),\
39 SRII(MPCC_MCM_SHAPER_OFFSET_G, MPCC_MCM, inst),\
40 SRII(MPCC_MCM_SHAPER_OFFSET_B, MPCC_MCM, inst),\
41 SRII(MPCC_MCM_SHAPER_SCALE_R, MPCC_MCM, inst),\
42 SRII(MPCC_MCM_SHAPER_SCALE_G_B, MPCC_MCM, inst),\
43 SRII(MPCC_MCM_SHAPER_LUT_INDEX, MPCC_MCM, inst),\
[all …]
/drivers/soc/mediatek/
Dmtk-cmdq-helper.c154 struct cmdq_instruction inst) in cmdq_pkt_append_command() argument
174 *cmd_ptr = inst; in cmdq_pkt_append_command()
182 struct cmdq_instruction inst; in cmdq_pkt_write() local
184 inst.op = CMDQ_CODE_WRITE; in cmdq_pkt_write()
185 inst.value = value; in cmdq_pkt_write()
186 inst.offset = offset; in cmdq_pkt_write()
187 inst.subsys = subsys; in cmdq_pkt_write()
189 return cmdq_pkt_append_command(pkt, inst); in cmdq_pkt_write()
196 struct cmdq_instruction inst = { {0} }; in cmdq_pkt_write_mask() local
201 inst.op = CMDQ_CODE_MASK; in cmdq_pkt_write_mask()
[all …]
/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dnv25.c37 &chan->inst); in nv25_gr_chan_new()
41 nvkm_kmap(chan->inst); in nv25_gr_chan_new()
42 nvkm_wo32(chan->inst, 0x0028, 0x00000001 | (chan->chid << 24)); in nv25_gr_chan_new()
43 nvkm_wo32(chan->inst, 0x035c, 0xffff0000); in nv25_gr_chan_new()
44 nvkm_wo32(chan->inst, 0x03c0, 0x0fff0000); in nv25_gr_chan_new()
45 nvkm_wo32(chan->inst, 0x03c4, 0x0fff0000); in nv25_gr_chan_new()
46 nvkm_wo32(chan->inst, 0x049c, 0x00000101); in nv25_gr_chan_new()
47 nvkm_wo32(chan->inst, 0x04b0, 0x00000111); in nv25_gr_chan_new()
48 nvkm_wo32(chan->inst, 0x04c8, 0x00000080); in nv25_gr_chan_new()
49 nvkm_wo32(chan->inst, 0x04cc, 0xffff0000); in nv25_gr_chan_new()
[all …]
Dnv35.c37 &chan->inst); in nv35_gr_chan_new()
41 nvkm_kmap(chan->inst); in nv35_gr_chan_new()
42 nvkm_wo32(chan->inst, 0x0028, 0x00000001 | (chan->chid << 24)); in nv35_gr_chan_new()
43 nvkm_wo32(chan->inst, 0x040c, 0x00000101); in nv35_gr_chan_new()
44 nvkm_wo32(chan->inst, 0x0420, 0x00000111); in nv35_gr_chan_new()
45 nvkm_wo32(chan->inst, 0x0424, 0x00000060); in nv35_gr_chan_new()
46 nvkm_wo32(chan->inst, 0x0440, 0x00000080); in nv35_gr_chan_new()
47 nvkm_wo32(chan->inst, 0x0444, 0xffff0000); in nv35_gr_chan_new()
48 nvkm_wo32(chan->inst, 0x0448, 0x00000001); in nv35_gr_chan_new()
49 nvkm_wo32(chan->inst, 0x045c, 0x44400000); in nv35_gr_chan_new()
[all …]
Dnv34.c37 &chan->inst); in nv34_gr_chan_new()
41 nvkm_kmap(chan->inst); in nv34_gr_chan_new()
42 nvkm_wo32(chan->inst, 0x0028, 0x00000001 | (chan->chid << 24)); in nv34_gr_chan_new()
43 nvkm_wo32(chan->inst, 0x040c, 0x01000101); in nv34_gr_chan_new()
44 nvkm_wo32(chan->inst, 0x0420, 0x00000111); in nv34_gr_chan_new()
45 nvkm_wo32(chan->inst, 0x0424, 0x00000060); in nv34_gr_chan_new()
46 nvkm_wo32(chan->inst, 0x0440, 0x00000080); in nv34_gr_chan_new()
47 nvkm_wo32(chan->inst, 0x0444, 0xffff0000); in nv34_gr_chan_new()
48 nvkm_wo32(chan->inst, 0x0448, 0x00000001); in nv34_gr_chan_new()
49 nvkm_wo32(chan->inst, 0x045c, 0x44400000); in nv34_gr_chan_new()
[all …]
/drivers/phy/mediatek/
Dphy-mtk-xsphy.c110 struct xsphy_instance *inst) in u2_phy_slew_rate_calibrate() argument
112 void __iomem *pbase = inst->port_base; in u2_phy_slew_rate_calibrate()
118 if (inst->eye_src) in u2_phy_slew_rate_calibrate()
157 inst->index, fm_out, calib_val, in u2_phy_slew_rate_calibrate()
168 struct xsphy_instance *inst) in u2_phy_instance_init() argument
170 void __iomem *pbase = inst->port_base; in u2_phy_instance_init()
179 struct xsphy_instance *inst) in u2_phy_instance_power_on() argument
181 void __iomem *pbase = inst->port_base; in u2_phy_instance_power_on()
182 u32 index = inst->index; in u2_phy_instance_power_on()
194 struct xsphy_instance *inst) in u2_phy_instance_power_off() argument
[all …]
/drivers/gpu/drm/nouveau/include/nvkm/engine/
Dgr.h17 int nv04_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
18 int nv10_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
19 int nv15_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
20 int nv17_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
21 int nv20_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
22 int nv25_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
23 int nv2a_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
24 int nv30_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
25 int nv34_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
26 int nv35_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
[all …]

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