Searched refs:intel_cx0_write (Results 1 – 1 of 1) sorted by relevance
/drivers/gpu/drm/i915/display/ |
D | intel_cx0_phy.c | 269 static void intel_cx0_write(struct drm_i915_private *i915, enum port port, in intel_cx0_write() function 283 intel_cx0_write(i915, port, lane, PHY_C20_WR_ADDRESS_H, addr >> 8, 0); in intel_c20_sram_write() 284 intel_cx0_write(i915, port, lane, PHY_C20_WR_ADDRESS_L, addr & 0xff, 0); in intel_c20_sram_write() 286 intel_cx0_write(i915, port, lane, PHY_C20_WR_DATA_H, data >> 8, 0); in intel_c20_sram_write() 287 intel_cx0_write(i915, port, lane, PHY_C20_WR_DATA_L, data & 0xff, 1); in intel_c20_sram_write() 297 intel_cx0_write(i915, port, lane, PHY_C20_RD_ADDRESS_H, addr >> 8, 0); in intel_c20_sram_read() 298 intel_cx0_write(i915, port, lane, PHY_C20_RD_ADDRESS_L, addr & 0xff, 1); in intel_c20_sram_read() 1857 intel_cx0_write(i915, encoder->port, INTEL_CX0_LANE0, PHY_C10_VDR_PLL(i), in intel_c10_pll_program() 1861 …intel_cx0_write(i915, encoder->port, INTEL_CX0_LANE0, PHY_C10_VDR_CMN(0), pll_state->cmn, MB_WRITE… in intel_c10_pll_program() 1862 …intel_cx0_write(i915, encoder->port, INTEL_CX0_LANE0, PHY_C10_VDR_TX(0), pll_state->tx, MB_WRITE_C… in intel_c10_pll_program() [all …]
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