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Searched refs:irq_offset (Results 1 – 13 of 13) sorted by relevance

/drivers/gpio/
Dgpio-ep93xx.c44 u8 irq_offset; member
85 writeb_relaxed(0, epg->base + eic->irq_offset + EP93XX_INT_EN_OFFSET); in ep93xx_gpio_update_int_params()
88 epg->base + eic->irq_offset + EP93XX_INT_TYPE2_OFFSET); in ep93xx_gpio_update_int_params()
91 epg->base + eic->irq_offset + EP93XX_INT_TYPE1_OFFSET); in ep93xx_gpio_update_int_params()
94 epg->base + eic->irq_offset + EP93XX_INT_EN_OFFSET); in ep93xx_gpio_update_int_params()
110 epg->base + eic->irq_offset + EP93XX_INT_DEBOUNCE_OFFSET); in ep93xx_gpio_int_debounce()
171 writeb(port_mask, epg->base + eic->irq_offset + EP93XX_INT_EOI_OFFSET); in ep93xx_gpio_irq_ack()
187 writeb(port_mask, epg->base + eic->irq_offset + EP93XX_INT_EOI_OFFSET); in ep93xx_gpio_irq_mask_ack()
372 egc->eic->irq_offset = bank->irq; in ep93xx_gpio_add_bank()
Dgpio-xilinx.c403 int irq_offset = irqd_to_hwirq(irq_data); in xgpio_irq_mask() local
404 int bit = xgpio_to_bit(chip, irq_offset); in xgpio_irq_mask()
419 gpiochip_disable_irq(&chip->gc, irq_offset); in xgpio_irq_mask()
430 int irq_offset = irqd_to_hwirq(irq_data); in xgpio_irq_unmask() local
431 int bit = xgpio_to_bit(chip, irq_offset); in xgpio_irq_unmask()
435 gpiochip_enable_irq(&chip->gc, irq_offset); in xgpio_irq_unmask()
470 int irq_offset = irqd_to_hwirq(irq_data); in xgpio_set_irq_type() local
471 int bit = xgpio_to_bit(chip, irq_offset); in xgpio_set_irq_type()
512 int irq_offset; in xgpio_irqhandler() local
543 irq_offset = xgpio_from_bit(chip, bit); in xgpio_irqhandler()
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/drivers/misc/ocxl/
Dfile.c206 u64 irq_offset; in afu_ioctl() local
229 irq_offset = ocxl_irq_id_to_offset(ctx, irq_id); in afu_ioctl()
230 rc = copy_to_user((u64 __user *) args, &irq_offset, in afu_ioctl()
231 sizeof(irq_offset)); in afu_ioctl()
240 rc = copy_from_user(&irq_offset, (u64 __user *) args, in afu_ioctl()
241 sizeof(irq_offset)); in afu_ioctl()
244 irq_id = ocxl_irq_offset_to_id(ctx, irq_offset); in afu_ioctl()
255 irq_id = ocxl_irq_offset_to_id(ctx, irq_fd.irq_offset); in afu_ioctl()
/drivers/crypto/marvell/octeontx2/
Dotx2_cptlf.c281 int lf_num, int irq_offset, in cptlf_do_register_interrrupts() argument
287 irq_offset); in cptlf_do_register_interrrupts()
289 lfs->lf[lf_num].irq_name[irq_offset], in cptlf_do_register_interrrupts()
294 lfs->lf[lf_num].is_irq_reg[irq_offset] = true; in cptlf_do_register_interrrupts()
/drivers/net/ethernet/marvell/octeontx2/af/
Dlmac_common.h72 u8 irq_offset; member
Drpm.c17 .irq_offset = 1,
49 .irq_offset = 1,
Dcgx.c1585 cnt * mac_ops->irq_offset); in cgx_configure_interrupt()
1769 .irq_offset = 9,
/drivers/dma/
Dsun6i-dma.c439 u32 irq_val, irq_reg, irq_offset; in sun6i_dma_start_desc() local
458 irq_offset = pchan->idx % DMA_IRQ_CHAN_NR; in sun6i_dma_start_desc()
464 (irq_offset * DMA_IRQ_CHAN_WIDTH)); in sun6i_dma_start_desc()
465 irq_val |= vchan->irq_type << (irq_offset * DMA_IRQ_CHAN_WIDTH); in sun6i_dma_start_desc()
/drivers/pci/controller/dwc/
Dpci-keystone.c611 u32 irq_offset = irq - ks_pcie->legacy_host_irqs[0]; in ks_pcie_legacy_irq_handler() local
622 ks_pcie_handle_legacy_irq(ks_pcie, irq_offset); in ks_pcie_legacy_irq_handler()
/drivers/scsi/qla2xxx/
Dqla_nvme.c844 blk_mq_pci_map_queues(map, vha->hw->pdev, vha->irq_offset); in qla_nvme_map_queues()
Dqla_def.h5118 unsigned int irq_offset; member
Dqla_isr.c4575 vha->irq_offset = desc.pre_vectors; in qla24xx_enable_msix()
Dqla_os.c8070 blk_mq_pci_map_queues(qmap, vha->hw->pdev, vha->irq_offset); in qla2xxx_map_queues()