| /drivers/gpu/drm/amd/display/dc/dcn32/ |
| D | dcn32_dccg.c | 61 enum pixel_rate_div *k1, in dccg32_get_pixel_rate_div() argument
67 *k1 = PIXEL_RATE_DIV_NA; in dccg32_get_pixel_rate_div()
96 *k1 = (enum pixel_rate_div)val_k1; in dccg32_get_pixel_rate_div()
103 enum pixel_rate_div k1, in dccg32_set_pixel_rate_div() argument
112 if (k1 == PIXEL_RATE_DIV_NA || k2 == PIXEL_RATE_DIV_NA) { in dccg32_set_pixel_rate_div()
118 if (k1 == cur_k1 && k2 == cur_k2) in dccg32_set_pixel_rate_div()
124 OTG0_PIXEL_RATE_DIVK1, k1, in dccg32_set_pixel_rate_div()
129 OTG1_PIXEL_RATE_DIVK1, k1, in dccg32_set_pixel_rate_div()
134 OTG2_PIXEL_RATE_DIVK1, k1, in dccg32_set_pixel_rate_div()
139 OTG3_PIXEL_RATE_DIVK1, k1, in dccg32_set_pixel_rate_div()
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| /drivers/gpu/drm/amd/display/dc/dcn314/ |
| D | dcn314_dccg.c | 61 enum pixel_rate_div *k1, in dccg314_get_pixel_rate_div() argument
67 *k1 = PIXEL_RATE_DIV_NA; in dccg314_get_pixel_rate_div()
96 *k1 = (enum pixel_rate_div)val_k1; in dccg314_get_pixel_rate_div()
103 enum pixel_rate_div k1, in dccg314_set_pixel_rate_div() argument
111 if (k1 == PIXEL_RATE_DIV_NA || k2 == PIXEL_RATE_DIV_NA) { in dccg314_set_pixel_rate_div()
117 if (k1 == cur_k1 && k2 == cur_k2) in dccg314_set_pixel_rate_div()
123 OTG0_PIXEL_RATE_DIVK1, k1, in dccg314_set_pixel_rate_div()
128 OTG1_PIXEL_RATE_DIVK1, k1, in dccg314_set_pixel_rate_div()
133 OTG2_PIXEL_RATE_DIVK1, k1, in dccg314_set_pixel_rate_div()
138 OTG3_PIXEL_RATE_DIVK1, k1, in dccg314_set_pixel_rate_div()
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| /drivers/net/ethernet/netronome/nfp/flower/ |
| D | conntrack.h | 18 char *k1, *m1, *k2, *m2; \
20 k1 = (char *)_match1.key; \
25 if ((k1[i] & m1[i] & m2[i]) ^ \
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| /drivers/crypto/ccp/ |
| D | ccp-crypto-aes-cmac.c | 306 gk = (__be64 *)ctx->u.aes.k1; in ccp_aes_cmac_setkey()
313 if (ctx->u.aes.k1[0] & 0x80) { in ccp_aes_cmac_setkey()
322 ctx->u.aes.kn_len = sizeof(ctx->u.aes.k1); in ccp_aes_cmac_setkey()
323 sg_init_one(&ctx->u.aes.k1_sg, ctx->u.aes.k1, sizeof(ctx->u.aes.k1)); in ccp_aes_cmac_setkey()
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| D | ccp-crypto.h | 109 u8 k1[AES_BLOCK_SIZE]; member
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| /drivers/clk/sprd/ |
| D | pll.c | 105 u16 k1, k2; in _sprd_pll_recalc_rate() local
133 k1 = pll->k1; in _sprd_pll_recalc_rate()
135 rate = DIV_ROUND_CLOSEST_ULL(refin * kint * k1, in _sprd_pll_recalc_rate()
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| D | pll.h | 56 u16 k1; member
73 .k1 = _k1, \
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| /drivers/i2c/busses/ |
| D | i2c-npcm7xx.c | 1809 u32 k1 = 0; in npcm_i2c_init_clk() local
1847 k1 = 80; in npcm_i2c_init_clk()
1856 k1 = clk_coef(src_clk_khz, 1600); in npcm_i2c_init_clk()
1870 k1 = clk_coef(src_clk_khz, 620); in npcm_i2c_init_clk()
1892 k1 = round_up(k1, 2); in npcm_i2c_init_clk()
1894 if (k1 < SCLFRQ_MIN || k1 > SCLFRQ_MAX || in npcm_i2c_init_clk()
1916 iowrite8(k1 / 2, bus->reg + NPCM_I2CSCLLT); in npcm_i2c_init_clk()
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| /drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | dccg.h | 159 enum pixel_rate_div k1,
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| /drivers/gpu/drm/nouveau/dispnv04/ |
| D | tvmodesnv17.c | 256 int64_t k1; member
337 int64_t c = (p->k1 + p->ki*i + p->ki2*i*i + in tv_setup_filter()
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| /drivers/gpu/drm/nouveau/dispnv50/ |
| D | atom.h | 248 u8 k1; member
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| D | wndwc37e.c | 108 NVVAL(NVC37E, SET_COMPOSITION_CONSTANT_ALPHA, K1, asyw->blend.k1) | in wndwc37e_blend_set()
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| D | wndw.c | 337 asyw->blend.k1 = asyw->state.alpha >> 8; in nv50_wndw_atomic_check_acquire()
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| /drivers/net/wireless/intel/iwlwifi/fw/api/ |
| D | sta.h | 441 u8 k1[16]; member
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| /drivers/gpu/drm/radeon/ |
| D | r100.c | 3201 fixed20_12 mc_latency_sclk, mc_latency_mclk, k1; in r100_bandwidth_update() local
3409 k1.full = dfixed_const(40); in r100_bandwidth_update()
3412 k1.full = dfixed_const(20); in r100_bandwidth_update()
3416 k1.full = dfixed_const(40); in r100_bandwidth_update()
3427 mc_latency_mclk.full += k1.full; in r100_bandwidth_update()
|