| /drivers/video/fbdev/omap2/omapfb/dss/ |
| D | pll.c | 244 u32 l; in dss_pll_write_config_type_a() local
246 l = 0; in dss_pll_write_config_type_a()
248 l = FLD_MOD(l, 1, 0, 0); /* PLL_STOPMODE */ in dss_pll_write_config_type_a()
249 l = FLD_MOD(l, cinfo->n - 1, hw->n_msb, hw->n_lsb); /* PLL_REGN */ in dss_pll_write_config_type_a()
250 l = FLD_MOD(l, cinfo->m, hw->m_msb, hw->m_lsb); /* PLL_REGM */ in dss_pll_write_config_type_a()
252 l = FLD_MOD(l, cinfo->mX[0] ? cinfo->mX[0] - 1 : 0, in dss_pll_write_config_type_a()
255 l = FLD_MOD(l, cinfo->mX[1] ? cinfo->mX[1] - 1 : 0, in dss_pll_write_config_type_a()
257 writel_relaxed(l, base + PLL_CONFIGURATION1); in dss_pll_write_config_type_a()
259 l = 0; in dss_pll_write_config_type_a()
261 l = FLD_MOD(l, cinfo->mX[2] ? cinfo->mX[2] - 1 : 0, in dss_pll_write_config_type_a()
[all …]
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| /drivers/gpu/drm/omapdrm/dss/ |
| D | pll.c | 402 u32 l; in dss_pll_write_config_type_a() local
404 l = 0; in dss_pll_write_config_type_a()
406 l = FLD_MOD(l, 1, 0, 0); /* PLL_STOPMODE */ in dss_pll_write_config_type_a()
407 l = FLD_MOD(l, cinfo->n - 1, hw->n_msb, hw->n_lsb); /* PLL_REGN */ in dss_pll_write_config_type_a()
408 l = FLD_MOD(l, cinfo->m, hw->m_msb, hw->m_lsb); /* PLL_REGM */ in dss_pll_write_config_type_a()
410 l = FLD_MOD(l, cinfo->mX[0] ? cinfo->mX[0] - 1 : 0, in dss_pll_write_config_type_a()
413 l = FLD_MOD(l, cinfo->mX[1] ? cinfo->mX[1] - 1 : 0, in dss_pll_write_config_type_a()
415 writel_relaxed(l, base + PLL_CONFIGURATION1); in dss_pll_write_config_type_a()
417 l = 0; in dss_pll_write_config_type_a()
419 l = FLD_MOD(l, cinfo->mX[2] ? cinfo->mX[2] - 1 : 0, in dss_pll_write_config_type_a()
[all …]
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| /drivers/md/ |
| D | dm-ima.c | 28 int l = strlen(*buf); in fix_separator_chars() local
31 for (i = 0; i < l; i++) in fix_separator_chars()
38 for (i = l-1, j = i+sp; i >= 0; i--) { in fix_separator_chars()
180 size_t device_data_buf_len, target_metadata_buf_len, target_data_buf_len, l = 0; in dm_ima_measure_on_table_load() local
229 memcpy(ima_buf + l, DM_IMA_VERSION_STR, table->md->ima.dm_version_str_len); in dm_ima_measure_on_table_load()
230 l += table->md->ima.dm_version_str_len; in dm_ima_measure_on_table_load()
233 memcpy(ima_buf + l, device_data_buf, device_data_buf_len); in dm_ima_measure_on_table_load()
234 l += device_data_buf_len; in dm_ima_measure_on_table_load()
263 cur_total_buf_len = l + target_metadata_buf_len + target_data_buf_len; in dm_ima_measure_on_table_load()
273 dm_ima_measure_data(table_load_event_name, ima_buf, l, noio); in dm_ima_measure_on_table_load()
[all …]
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| D | dm-bio-prison-v1.c | 182 unsigned l = lock_nr(key, prison->num_locks); in bio_detain() local
184 spin_lock_irq(&prison->regions[l].lock); in bio_detain()
185 r = __bio_detain(&prison->regions[l].cell, key, inmate, cell_prealloc, cell_result); in bio_detain()
186 spin_unlock_irq(&prison->regions[l].lock); in bio_detain()
230 unsigned l = lock_nr(&cell->key, prison->num_locks); in dm_cell_release() local
232 spin_lock_irq(&prison->regions[l].lock); in dm_cell_release()
233 __cell_release(&prison->regions[l].cell, cell, bios); in dm_cell_release()
234 spin_unlock_irq(&prison->regions[l].lock); in dm_cell_release()
253 unsigned l = lock_nr(&cell->key, prison->num_locks); in dm_cell_release_no_holder() local
256 spin_lock_irqsave(&prison->regions[l].lock, flags); in dm_cell_release_no_holder()
[all …]
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| /drivers/macintosh/ |
| D | windfarm_smu_controls.c | 163 const char *l; in smu_fan_create() local
169 l = of_get_property(node, "location", NULL); in smu_fan_create()
170 if (l == NULL) in smu_fan_create()
188 if (!strcmp(l, "Rear Fan 0") || !strcmp(l, "Rear Fan") || in smu_fan_create()
189 !strcmp(l, "Rear fan 0") || !strcmp(l, "Rear fan") || in smu_fan_create()
190 !strcmp(l, "CPU A EXHAUST")) in smu_fan_create()
192 else if (!strcmp(l, "Rear Fan 1") || !strcmp(l, "Rear fan 1") || in smu_fan_create()
193 !strcmp(l, "CPU B EXHAUST")) in smu_fan_create()
195 else if (!strcmp(l, "Front Fan 0") || !strcmp(l, "Front Fan") || in smu_fan_create()
196 !strcmp(l, "Front fan 0") || !strcmp(l, "Front fan") || in smu_fan_create()
[all …]
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| /drivers/video/fbdev/omap/ |
| D | sossi.c | 212 u32 l; in _set_timing() local
221 l = sossi_read_reg(SOSSI_INIT1_REG); in _set_timing()
222 l &= ~((0x0f << 20) | (0x3f << 24)); in _set_timing()
223 l |= (tw0 << 20) | (tw1 << 24); in _set_timing()
224 sossi_write_reg(SOSSI_INIT1_REG, l); in _set_timing()
230 u32 l; in _set_bits_per_cycle() local
232 l = sossi_read_reg(SOSSI_INIT3_REG); in _set_bits_per_cycle()
233 l &= ~0x3ff; in _set_bits_per_cycle()
234 l |= ((bus_pick_count - 1) << 5) | ((bus_pick_width - 1) & 0x1f); in _set_bits_per_cycle()
235 sossi_write_reg(SOSSI_INIT3_REG, l); in _set_bits_per_cycle()
[all …]
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| D | lcdc.c | 83 u32 l; in set_load_mode() local
85 l = omap_readl(OMAP_LCDC_CONTROL); in set_load_mode()
86 l &= ~(3 << 20); in set_load_mode()
89 l |= 1 << 20; in set_load_mode()
92 l |= 2 << 20; in set_load_mode()
99 omap_writel(l, OMAP_LCDC_CONTROL); in set_load_mode()
104 u32 l; in enable_controller() local
106 l = omap_readl(OMAP_LCDC_CONTROL); in enable_controller()
107 l |= OMAP_LCDC_CTRL_LCD_EN; in enable_controller()
108 l &= ~OMAP_LCDC_IRQ_MASK; in enable_controller()
[all …]
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| /drivers/md/bcache/ |
| D | bset.h | 190 bool (*sort_cmp)(struct btree_iter_set l,
203 struct bkey *l, struct bkey *r);
301 bool bch_bkey_try_merge(struct btree_keys *b, struct bkey *l, struct bkey *r);
421 static __always_inline int64_t bkey_cmp(const struct bkey *l, in bkey_cmp() argument
424 return unlikely(KEY_INODE(l) != KEY_INODE(r)) in bkey_cmp()
425 ? (int64_t) KEY_INODE(l) - (int64_t) KEY_INODE(r) in bkey_cmp()
426 : (int64_t) KEY_OFFSET(l) - (int64_t) KEY_OFFSET(r); in bkey_cmp()
483 static inline bool bch_bkey_equal_header(const struct bkey *l, in bch_bkey_equal_header() argument
486 return (KEY_DIRTY(l) == KEY_DIRTY(r) && in bch_bkey_equal_header()
487 KEY_PTRS(l) == KEY_PTRS(r) && in bch_bkey_equal_header()
[all …]
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| D | extents.c | 39 static bool bch_key_sort_cmp(struct btree_iter_set l, in bch_key_sort_cmp() argument
42 int64_t c = bkey_cmp(l.k, r.k); in bch_key_sort_cmp()
44 return c ? c > 0 : l.k < r.k; in bch_key_sort_cmp()
258 static bool bch_extent_sort_cmp(struct btree_iter_set l, in bch_extent_sort_cmp() argument
261 int64_t c = bkey_cmp(&START_KEY(l.k), &START_KEY(r.k)); in bch_extent_sort_cmp()
263 return c ? c > 0 : l.k < r.k; in bch_extent_sort_cmp()
575 static uint64_t merge_chksums(struct bkey *l, struct bkey *r) in merge_chksums() argument
577 return (l->ptr[KEY_PTRS(l)] + r->ptr[KEY_PTRS(r)]) & in merge_chksums()
582 struct bkey *l, in bch_extent_merge() argument
591 for (i = 0; i < KEY_PTRS(l); i++) in bch_extent_merge()
[all …]
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| /drivers/scsi/arm/ |
| D | queue.c | 110 struct list_head *l; in __queue_add() local
118 l = queue->free.next; in __queue_add()
119 list_del(l); in __queue_add()
121 q = list_entry(l, QE_t, list); in __queue_add()
128 list_add(l, &queue->head); in __queue_add()
130 list_add_tail(l, &queue->head); in __queue_add()
165 struct list_head *l; in queue_remove_exclude() local
169 list_for_each(l, &queue->head) { in queue_remove_exclude()
170 QE_t *q = list_entry(l, QE_t, list); in queue_remove_exclude()
173 SCpnt = __queue_remove(queue, l); in queue_remove_exclude()
[all …]
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| /drivers/cpufreq/ |
| D | p4-clockmod.c | 54 u32 l, h; in cpufreq_p4_setdc() local
59 rdmsr_on_cpu(cpu, MSR_IA32_THERM_STATUS, &l, &h); in cpufreq_p4_setdc()
61 if (l & 0x01) in cpufreq_p4_setdc()
68 rdmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, &l, &h); in cpufreq_p4_setdc()
71 wrmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, l & ~(1<<4), h); in cpufreq_p4_setdc()
80 l = (l & ~14); in cpufreq_p4_setdc()
81 l = l | (1<<4) | ((newstate & 0x7)<<1); in cpufreq_p4_setdc()
82 wrmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, l, h); in cpufreq_p4_setdc()
208 u32 l, h; in cpufreq_p4_get() local
210 rdmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, &l, &h); in cpufreq_p4_get()
[all …]
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| /drivers/gpu/drm/sun4i/ |
| D | sun4i_backend.h | 29 #define SUN4I_BACKEND_MODCTL_LAY_EN(l) BIT(8 + l) argument
43 #define SUN4I_BACKEND_LAYSIZE_REG(l) (0x810 + (0x4 * (l))) argument
47 #define SUN4I_BACKEND_LAYCOOR_REG(l) (0x820 + (0x4 * (l))) argument
51 #define SUN4I_BACKEND_LAYLINEWIDTH_REG(l) (0x840 + (0x4 * (l))) argument
53 #define SUN4I_BACKEND_LAYFB_L32ADD_REG(l) (0x850 + (0x4 * (l))) argument
56 #define SUN4I_BACKEND_LAYFB_H4ADD_MSK(l) GENMASK(3 + ((l) * 8), (l) * 8) argument
57 #define SUN4I_BACKEND_LAYFB_H4ADD(l, val) ((val) << ((l) * 8)) argument
66 #define SUN4I_BACKEND_ATTCTL_REG0(l) (0x890 + (0x4 * (l))) argument
77 #define SUN4I_BACKEND_ATTCTL_REG1(l) (0x8a0 + (0x4 * (l))) argument
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| /drivers/char/tpm/ |
| D | tpm_tis_core.h | 70 #define TPM_ACCESS(l) (0x0000 | ((l) << 12)) argument
71 #define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12)) argument
72 #define TPM_INT_VECTOR(l) (0x000C | ((l) << 12)) argument
73 #define TPM_INT_STATUS(l) (0x0010 | ((l) << 12)) argument
74 #define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12)) argument
75 #define TPM_STS(l) (0x0018 | ((l) << 12)) argument
76 #define TPM_STS3(l) (0x001b | ((l) << 12)) argument
77 #define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12)) argument
79 #define TPM_DID_VID(l) (0x0F00 | ((l) << 12)) argument
80 #define TPM_RID(l) (0x0F04 | ((l) << 12)) argument
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| /drivers/net/ethernet/smsc/ |
| D | smc91x.h | 90 #define SMC_insb(a, r, p, l) readsb((a) + (r), p, l) argument
91 #define SMC_outsb(a, r, p, l) writesb((a) + (r), p, l) argument
92 #define SMC_insw(a, r, p, l) readsw((a) + (r), p, l) argument
93 #define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l) argument
94 #define SMC_insl(a, r, p, l) readsl((a) + (r), p, l) argument
95 #define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l) argument
129 #define SMC_insl(a, r, p, l) insl((a) + (r) - 0xa0000000, p, l) argument
130 #define SMC_outsl(a, r, p, l) outsl((a) + (r) - 0xa0000000, p, l) argument
131 #define SMC_insw(a, r, p, l) insw((a) + (r) - 0xa0000000, p, l) argument
132 #define SMC_outsw(a, r, p, l) outsw((a) + (r) - 0xa0000000, p, l) argument
[all …]
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| /drivers/clocksource/ |
| D | timer-ti-dm.c | 260 u32 l; in __omap_dm_timer_stop() local
262 l = dmtimer_read(timer, OMAP_TIMER_CTRL_REG); in __omap_dm_timer_stop()
263 if (l & OMAP_TIMER_CTRL_ST) { in __omap_dm_timer_stop()
264 l &= ~0x1; in __omap_dm_timer_stop()
265 dmtimer_write(timer, OMAP_TIMER_CTRL_REG, l); in __omap_dm_timer_stop()
369 u32 l, timeout = 100000; in omap_dm_timer_reset() local
377 l = dmtimer_read(timer, OMAP_TIMER_V1_SYS_STAT_OFFSET); in omap_dm_timer_reset()
378 } while (!l && timeout--); in omap_dm_timer_reset()
386 l = dmtimer_read(timer, OMAP_TIMER_OCP_CFG_OFFSET); in omap_dm_timer_reset()
387 l |= 0x2 << 0x3; in omap_dm_timer_reset()
[all …]
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| /drivers/isdn/capi/ |
| D | capiutil.c | 196 #define structTLcpy(x, y, l) memcpy(x, y, l) argument
197 #define structTLcpyovl(x, y, l) memmove(x, y, l) argument
202 #define structTRcpy(x, y, l) memcpy(y, x, l) argument
203 #define structTRcpyovl(x, y, l) memmove(y, x, l) argument
483 cdb = bufprint(cdb, "%-*s = 0x%x\n", slen, NAME, *(u8 *) (cmsg->m + cmsg->l)); in protocol_message_2_pars()
484 cmsg->l++; in protocol_message_2_pars()
487 cdb = bufprint(cdb, "%-*s = 0x%x\n", slen, NAME, *(u16 *) (cmsg->m + cmsg->l)); in protocol_message_2_pars()
488 cmsg->l += 2; in protocol_message_2_pars()
491 cdb = bufprint(cdb, "%-*s = 0x%lx\n", slen, NAME, *(u32 *) (cmsg->m + cmsg->l)); in protocol_message_2_pars()
492 cmsg->l += 4; in protocol_message_2_pars()
[all …]
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| /drivers/media/platform/verisilicon/ |
| D | hantro_vp9.c | 71 static void *get_coeffs_arr(struct symbol_counts *cnts, int i, int j, int k, int l, int m) in get_coeffs_arr() argument
74 return &cnts->count_coeffs[j][k][l][m]; in get_coeffs_arr()
77 return &cnts->count_coeffs8x8[j][k][l][m]; in get_coeffs_arr()
80 return &cnts->count_coeffs16x16[j][k][l][m]; in get_coeffs_arr()
83 return &cnts->count_coeffs32x32[j][k][l][m]; in get_coeffs_arr()
88 static void *get_eobs1(struct symbol_counts *cnts, int i, int j, int k, int l, int m) in get_eobs1() argument
91 return &cnts->count_coeffs[j][k][l][m][3]; in get_eobs1()
94 return &cnts->count_coeffs8x8[j][k][l][m][3]; in get_eobs1()
97 return &cnts->count_coeffs16x16[j][k][l][m][3]; in get_eobs1()
100 return &cnts->count_coeffs32x32[j][k][l][m][3]; in get_eobs1()
[all …]
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| /drivers/firmware/efi/ |
| D | efibc.c | 42 unsigned long l; in efibc_reboot_notifier_call() local
54 for (l = 0; l < MAX_DATA_LEN - 1 && str[l] != '\0'; l++) in efibc_reboot_notifier_call()
55 wdata[l] = str[l]; in efibc_reboot_notifier_call()
56 wdata[l] = L'\0'; in efibc_reboot_notifier_call()
58 efibc_set_variable(L"LoaderEntryOneShot", wdata, l); in efibc_reboot_notifier_call()
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| /drivers/media/platform/qcom/camss/ |
| D | camss-csiphy-3ph-1-0.c | 358 int i, l = 0; in csiphy_gen1_config_lanes() local
363 l = 7; in csiphy_gen1_config_lanes()
365 l = c->data[i].pos * 2; in csiphy_gen1_config_lanes()
369 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG1(l)); in csiphy_gen1_config_lanes()
372 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG2(l)); in csiphy_gen1_config_lanes()
375 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG3(l)); in csiphy_gen1_config_lanes()
379 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG5(l)); in csiphy_gen1_config_lanes()
382 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG6(l)); in csiphy_gen1_config_lanes()
385 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG7(l)); in csiphy_gen1_config_lanes()
389 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG8(l)); in csiphy_gen1_config_lanes()
[all …]
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| D | camss-csiphy-2ph-1-0.c | 103 u8 val, l = 0; in csiphy_lanes_enable() local
122 l = CAMSS_CSI_PHY_LN_CLK; in csiphy_lanes_enable()
124 l = c->data[i].pos; in csiphy_lanes_enable()
127 CAMSS_CSI_PHY_LNn_CFG2(l)); in csiphy_lanes_enable()
129 CAMSS_CSI_PHY_LNn_CFG3(l)); in csiphy_lanes_enable()
131 CAMSS_CSI_PHY_INTERRUPT_MASKn(l)); in csiphy_lanes_enable()
133 CAMSS_CSI_PHY_INTERRUPT_CLEARn(l)); in csiphy_lanes_enable()
141 u8 l = 0; in csiphy_lanes_disable() local
146 l = CAMSS_CSI_PHY_LN_CLK; in csiphy_lanes_disable()
148 l = c->data[i].pos; in csiphy_lanes_disable()
[all …]
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| /drivers/gpu/drm/nouveau/include/nvkm/core/ |
| D | subdev.h | 73 #define nvkm_printk_ok(s,u,l) \ argument
74 ((CONFIG_NOUVEAU_DEBUG >= (l)) && ((s)->debug >= (l) || ((u) && (u)->debug >= (l))))
75 #define nvkm_printk___(s,u,l,p,f,a...) do { \ argument
76 if (nvkm_printk_ok((s), (u), (l))) { \
83 #define nvkm_printk__(s,l,p,f,a...) nvkm_printk___((s), (s), (l), p, f, ##a) argument
84 #define nvkm_printk_(s,l,p,f,a...) nvkm_printk__((s), (l), p, " "f, ##a) argument
85 #define nvkm_printk(s,l,p,f,a...) nvkm_printk_((s), NV_DBG_##l, p, f, ##a) argument
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| /drivers/spi/ |
| D | spi-omap2-mcspi.c | 205 u32 l, rw; in omap2_mcspi_set_dma_req() local
207 l = mcspi_cached_chconf0(spi); in omap2_mcspi_set_dma_req()
215 l |= rw; in omap2_mcspi_set_dma_req()
217 l &= ~rw; in omap2_mcspi_set_dma_req()
219 mcspi_write_chconf0(spi, l); in omap2_mcspi_set_dma_req()
225 u32 l; in omap2_mcspi_set_enable() local
227 l = cs->chctrl0; in omap2_mcspi_set_enable()
229 l |= OMAP2_MCSPI_CHCTRL_EN; in omap2_mcspi_set_enable()
231 l &= ~OMAP2_MCSPI_CHCTRL_EN; in omap2_mcspi_set_enable()
232 cs->chctrl0 = l; in omap2_mcspi_set_enable()
[all …]
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| /drivers/thermal/intel/ |
| D | x86_pkg_temp_thermal.c | 126 u32 l, h, mask, shift, intr; in sys_set_trip_temp() local
140 &l, &h); in sys_set_trip_temp()
153 l &= ~mask; in sys_set_trip_temp()
159 l &= ~intr; in sys_set_trip_temp()
161 l |= val << shift; in sys_set_trip_temp()
162 l |= intr; in sys_set_trip_temp()
166 l, h); in sys_set_trip_temp()
184 u32 l, h; in enable_pkg_thres_interrupt() local
186 rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h); in enable_pkg_thres_interrupt()
188 thres_0 = (l & THERM_MASK_THRESHOLD0) >> THERM_SHIFT_THRESHOLD0; in enable_pkg_thres_interrupt()
[all …]
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| D | therm_throt.c | 531 u32 l; in thermal_throttle_online() local
547 l = apic_read(APIC_LVTTHMR); in thermal_throttle_online()
548 apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED); in thermal_throttle_online()
557 u32 l; in thermal_throttle_offline() local
560 l = apic_read(APIC_LVTTHMR); in thermal_throttle_offline()
561 apic_write(APIC_LVTTHMR, l | APIC_LVT_MASKED); in thermal_throttle_offline()
720 u32 l, h; in intel_init_thermal() local
730 rdmsr(MSR_IA32_MISC_ENABLE, l, h); in intel_init_thermal()
747 if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) { in intel_init_thermal()
756 rdmsr(MSR_THERM2_CTL, l, h); in intel_init_thermal()
[all …]
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| /drivers/virtio/ |
| D | virtio_pci_modern.c | 74 __le32 l; in vp_get() local
88 l = cpu_to_le32(ioread32(device + offset)); in vp_get()
89 memcpy(buf, &l, sizeof l); in vp_get()
92 l = cpu_to_le32(ioread32(device + offset)); in vp_get()
93 memcpy(buf, &l, sizeof l); in vp_get()
94 l = cpu_to_le32(ioread32(device + offset + sizeof l)); in vp_get()
95 memcpy(buf + sizeof l, &l, sizeof l); in vp_get()
112 __le32 l; in vp_set() local
126 memcpy(&l, buf, sizeof l); in vp_set()
127 iowrite32(le32_to_cpu(l), device + offset); in vp_set()
[all …]
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