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Searched refs:masked_reg (Results 1 – 5 of 5) sorted by relevance

/drivers/iio/accel/
Dstk8312.c245 u8 masked_reg; in stk8312_set_sample_rate() local
262 masked_reg = (ret & (~STK8312_SR_MASK)) | rate; in stk8312_set_sample_rate()
264 ret = i2c_smbus_write_byte_data(client, STK8312_REG_SR, masked_reg); in stk8312_set_sample_rate()
282 u8 masked_reg; in stk8312_set_range() local
301 masked_reg = ret & (~STK8312_RNG_MASK); in stk8312_set_range()
302 masked_reg |= range << STK8312_RNG_SHIFT; in stk8312_set_range()
304 ret = i2c_smbus_write_byte_data(client, STK8312_REG_STH, masked_reg); in stk8312_set_range()
Dstk8ba50.c183 u8 masked_reg; in stk8ba50_set_power() local
191 masked_reg = ret | STK8BA50_MODE_POWERBIT; in stk8ba50_set_power()
193 masked_reg = ret & (~STK8BA50_MODE_POWERBIT); in stk8ba50_set_power()
196 masked_reg); in stk8ba50_set_power()
/drivers/gpu/drm/i915/gt/
Dintel_workarounds_types.h24 u32 masked_reg:1; member
Dintel_workarounds.c215 u32 clear, u32 set, u32 read_mask, bool masked_reg) in wa_add() argument
222 .masked_reg = masked_reg, in wa_add()
229 u32 clear, u32 set, u32 read_mask, bool masked_reg) in wa_mcr_add() argument
236 .masked_reg = masked_reg, in wa_mcr_add()
996 if (wa->masked_reg || (wa->clr | wa->set) == U32_MAX) { in intel_engine_emit_ctx_wa()
/drivers/gpu/drm/i915/gt/uc/
Dintel_guc_ads.c381 ret |= GUC_MMIO_REG_ADD(gt, regset, wa->reg, wa->masked_reg); in guc_mmio_regset_init()