Searched refs:max_pfn (Results 1 – 25 of 34) sorted by relevance
12
31 uint64_t addr = adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT; in amdgpu_csa_vaddr()
336 lower_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v3_0_3_setup_vmid_config()339 upper_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v3_0_3_setup_vmid_config()
323 lower_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v2_0_setup_vmid_config()326 upper_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v2_0_setup_vmid_config()
303 lower_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v1_0_setup_vmid_config()306 upper_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v1_0_setup_vmid_config()
331 lower_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v3_0_setup_vmid_config()334 upper_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v3_0_setup_vmid_config()
353 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_0_2_setup_vmid_config()356 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_0_2_setup_vmid_config()
348 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_0_1_setup_vmid_config()351 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_0_1_setup_vmid_config()
404 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v2_0_setup_vmid_config()407 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v2_0_setup_vmid_config()
322 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v2_3_setup_vmid_config()325 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v2_3_setup_vmid_config()
361 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_0_setup_vmid_config()364 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_0_setup_vmid_config()
377 lower_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v1_2_xcc_setup_vmid_config()381 upper_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v1_2_xcc_setup_vmid_config()
281 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v1_0_setup_vmid_config()284 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v1_0_setup_vmid_config()
438 uint32_t high = adev->vm_manager.max_pfn - in gmc_v6_0_set_prt()519 WREG32(mmVM_CONTEXT1_PAGE_TABLE_END_ADDR, adev->vm_manager.max_pfn - 1); in gmc_v6_0_gart_enable()
386 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v1_8_setup_vmid_config()390 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v1_8_setup_vmid_config()
332 lower_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v2_1_setup_vmid_config()335 upper_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v2_1_setup_vmid_config()
358 uint64_t max_pfn; member
571 uint32_t high = adev->vm_manager.max_pfn - in gmc_v7_0_set_prt()669 WREG32(mmVM_CONTEXT1_PAGE_TABLE_END_ADDR, adev->vm_manager.max_pfn - 1); in gmc_v7_0_gart_enable()
313 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v1_7_setup_vmid_config()316 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v1_7_setup_vmid_config()
1529 if (lpfn >= adev->vm_manager.max_pfn) in amdgpu_vm_verify_parameters()2079 adev->vm_manager.max_pfn = (uint64_t)vm_size << 18; in amdgpu_vm_adjust_size()2081 tmp = roundup_pow_of_two(adev->vm_manager.max_pfn); in amdgpu_vm_adjust_size()
786 uint32_t high = adev->vm_manager.max_pfn - in gmc_v8_0_set_prt()900 WREG32(mmVM_CONTEXT1_PAGE_TABLE_END_ADDR, adev->vm_manager.max_pfn - 1); in gmc_v8_0_gart_enable()
154 .gpuvm_size = min(adev->vm_manager.max_pfn in amdgpu_amdkfd_device_init()
354 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v9_4_setup_vmid_config()359 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v9_4_setup_vmid_config()
82 return round_up(adev->vm_manager.max_pfn, 1ULL << shift) in amdgpu_vm_pt_num_entries()
692 extra_pfn_end = min(max_pfn, start_pfn + pages); in balloon_add_regions()712 ? min(xen_start_info->nr_pages - xen_released_pages, max_pfn) in balloon_init()
62 return rdev->vm_manager.max_pfn >> radeon_vm_block_size; in radeon_vm_num_pdes()467 if (last_pfn >= rdev->vm_manager.max_pfn) { in radeon_vm_bo_set_addr()469 last_pfn, rdev->vm_manager.max_pfn); in radeon_vm_bo_set_addr()