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Searched refs:mg_pll_tdc_coldst_bias (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/i915/display/
Dintel_dpll_mgr.h222 u32 mg_pll_tdc_coldst_bias; member
Dintel_dpll_mgr.c2982 pll_state->mg_pll_tdc_coldst_bias = in icl_calc_mg_pll_state()
3023 pll_state->mg_pll_tdc_coldst_bias = in icl_calc_mg_pll_state()
3048 pll_state->mg_pll_tdc_coldst_bias &= in icl_calc_mg_pll_state()
3442 hw_state->mg_pll_tdc_coldst_bias = in mg_pll_get_hw_state()
3453 hw_state->mg_pll_tdc_coldst_bias &= hw_state->mg_pll_tdc_coldst_bias_mask; in mg_pll_get_hw_state()
3522 hw_state->mg_pll_tdc_coldst_bias = in dkl_pll_get_hw_state()
3524 hw_state->mg_pll_tdc_coldst_bias &= (DKL_PLL_TDC_SSC_STEP_SIZE_MASK | in dkl_pll_get_hw_state()
3689 hw_state->mg_pll_tdc_coldst_bias); in icl_mg_pll_write()
3753 val |= hw_state->mg_pll_tdc_coldst_bias; in dkl_pll_write()
3969 hw_state->mg_pll_tdc_coldst_bias); in icl_dump_hw_state()
Dintel_display_debugfs.c689 pll->state.hw_state.mg_pll_tdc_coldst_bias); in i915_shared_dplls_info()
Dintel_display.c5347 PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_tdc_coldst_bias); in intel_pipe_config_compare()