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Searched refs:mipi_tx (Results 1 – 3 of 3) sorted by relevance

/drivers/phy/mediatek/
Dphy-mtk-mipi-dsi.c16 struct mtk_mipi_tx *mipi_tx = mtk_mipi_tx_from_clk_hw(hw); in mtk_mipi_tx_pll_set_rate() local
18 dev_dbg(mipi_tx->dev, "set rate: %lu Hz\n", rate); in mtk_mipi_tx_pll_set_rate()
20 mipi_tx->data_rate = rate; in mtk_mipi_tx_pll_set_rate()
28 struct mtk_mipi_tx *mipi_tx = mtk_mipi_tx_from_clk_hw(hw); in mtk_mipi_tx_pll_recalc_rate() local
30 return mipi_tx->data_rate; in mtk_mipi_tx_pll_recalc_rate()
35 struct mtk_mipi_tx *mipi_tx = phy_get_drvdata(phy); in mtk_mipi_tx_power_on() local
39 ret = clk_prepare_enable(mipi_tx->pll_hw.clk); in mtk_mipi_tx_power_on()
44 mipi_tx->driver_data->mipi_tx_enable_signal(phy); in mtk_mipi_tx_power_on()
50 struct mtk_mipi_tx *mipi_tx = phy_get_drvdata(phy); in mtk_mipi_tx_power_off() local
53 mipi_tx->driver_data->mipi_tx_disable_signal(phy); in mtk_mipi_tx_power_off()
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Dphy-mtk-mipi-dsi-mt8183.c49 struct mtk_mipi_tx *mipi_tx = mtk_mipi_tx_from_clk_hw(hw); in mtk_mipi_tx_pll_enable() local
50 void __iomem *base = mipi_tx->regs; in mtk_mipi_tx_pll_enable()
54 dev_dbg(mipi_tx->dev, "enable: %u bps\n", mipi_tx->data_rate); in mtk_mipi_tx_pll_enable()
56 if (mipi_tx->data_rate >= 2000000000) { in mtk_mipi_tx_pll_enable()
59 } else if (mipi_tx->data_rate >= 1000000000) { in mtk_mipi_tx_pll_enable()
62 } else if (mipi_tx->data_rate >= 500000000) { in mtk_mipi_tx_pll_enable()
65 } else if (mipi_tx->data_rate > 250000000) { in mtk_mipi_tx_pll_enable()
68 } else if (mipi_tx->data_rate >= 125000000) { in mtk_mipi_tx_pll_enable()
81 pcw = div_u64(((u64)mipi_tx->data_rate * txdiv) << 24, 26000000); in mtk_mipi_tx_pll_enable()
91 struct mtk_mipi_tx *mipi_tx = mtk_mipi_tx_from_clk_hw(hw); in mtk_mipi_tx_pll_disable() local
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Dphy-mtk-mipi-dsi-mt8173.c124 struct mtk_mipi_tx *mipi_tx = mtk_mipi_tx_from_clk_hw(hw); in mtk_mipi_tx_pll_prepare() local
125 void __iomem *base = mipi_tx->regs; in mtk_mipi_tx_pll_prepare()
129 dev_dbg(mipi_tx->dev, "prepare: %u Hz\n", mipi_tx->data_rate); in mtk_mipi_tx_pll_prepare()
131 if (mipi_tx->data_rate >= 500000000) { in mtk_mipi_tx_pll_prepare()
135 } else if (mipi_tx->data_rate >= 250000000) { in mtk_mipi_tx_pll_prepare()
139 } else if (mipi_tx->data_rate >= 125000000) { in mtk_mipi_tx_pll_prepare()
143 } else if (mipi_tx->data_rate > 62000000) { in mtk_mipi_tx_pll_prepare()
147 } else if (mipi_tx->data_rate >= 50000000) { in mtk_mipi_tx_pll_prepare()
196 pcw = div_u64(((u64)mipi_tx->data_rate * 2 * txdiv) << 24, 26000000); in mtk_mipi_tx_pll_prepare()
209 mipi_tx->driver_data->mppll_preserve); in mtk_mipi_tx_pll_prepare()
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