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Searched refs:mmAFMT_RAMP_CONTROL3 (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h385 #define mmAFMT_RAMP_CONTROL3 0x1C47 macro
Ddce_8_0_d.h3311 #define mmAFMT_RAMP_CONTROL3 0x1c47 macro
Ddce_11_0_d.h3987 #define mmAFMT_RAMP_CONTROL3 0x4a3e macro
Ddce_10_0_d.h4090 #define mmAFMT_RAMP_CONTROL3 0x4a3e macro
Ddce_11_2_d.h5218 #define mmAFMT_RAMP_CONTROL3 0x4a3e macro
/drivers/gpu/drm/amd/amdgpu/
Ddce_v8_0.c1672 WREG32(mmAFMT_RAMP_CONTROL3 + offset, 0x00000001); in dce_v8_0_afmt_setmode()
Ddce_v10_0.c1739 WREG32(mmAFMT_RAMP_CONTROL3 + dig->afmt->offset, 0x00000001); in dce_v10_0_afmt_setmode()
Ddce_v11_0.c1788 WREG32(mmAFMT_RAMP_CONTROL3 + dig->afmt->offset, 0x00000001); in dce_v11_0_afmt_setmode()