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Searched refs:mmDCP5_INPUT_GAMMA_CONTROL (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h2381 #define mmDCP5_INPUT_GAMMA_CONTROL 0x4910 macro
Ddce_8_0_d.h1646 #define mmDCP5_INPUT_GAMMA_CONTROL 0x4910 macro
Ddce_11_0_d.h2389 #define mmDCP5_INPUT_GAMMA_CONTROL 0x4410 macro
Ddce_10_0_d.h2495 #define mmDCP5_INPUT_GAMMA_CONTROL 0x4410 macro
Ddce_11_2_d.h3620 #define mmDCP5_INPUT_GAMMA_CONTROL 0x4410 macro
Ddce_12_0_offset.h7450 #define mmDCP5_INPUT_GAMMA_CONTROL … macro