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Searched refs:mmDIG5_AFMT_ISRC2_1 (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h2935 #define mmDIG5_AFMT_ISRC2_1 0x4B1E macro
Ddce_8_0_d.h3037 #define mmDIG5_AFMT_ISRC2_1 0x4b1e macro
Ddce_11_0_d.h3643 #define mmDIG5_AFMT_ISRC2_1 0x4f1b macro
Ddce_10_0_d.h3816 #define mmDIG5_AFMT_ISRC2_1 0x4f1b macro
Ddce_11_2_d.h4874 #define mmDIG5_AFMT_ISRC2_1 0x4f1b macro
Ddce_12_0_offset.h11496 #define mmDIG5_AFMT_ISRC2_1 … macro
/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h9779 #define mmDIG5_AFMT_ISRC2_1 … macro
Ddcn_2_0_0_offset.h12458 #define mmDIG5_AFMT_ISRC2_1 … macro