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Searched refs:mmMCLK_PWRMGT_CNTL (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dci_baco.c102 …{ CMD_READMODIFYWRITE, mmMCLK_PWRMGT_CNTL, MCLK_PWRMGT_CNTL__MRDCK0_PDNB_MASK, MCLK_PWRMGT_CNTL__M…
103 …{ CMD_READMODIFYWRITE, mmMCLK_PWRMGT_CNTL, MCLK_PWRMGT_CNTL__MRDCK1_PDNB_MASK, MCLK_PWRMGT_CNTL__M…
Dtonga_baco.c93 …{ CMD_READMODIFYWRITE, mmMCLK_PWRMGT_CNTL, MCLK_PWRMGT_CNTL__MRDCK0_PDNB_MASK, MCLK_PWRMGT_CNTL__M…
94 …{ CMD_READMODIFYWRITE, mmMCLK_PWRMGT_CNTL, MCLK_PWRMGT_CNTL__MRDCK1_PDNB_MASK, MCLK_PWRMGT_CNTL__M…
Dsmu7_hwmgr.c4807 cgs_read_register(hwmgr->device, mmMCLK_PWRMGT_CNTL); in smu7_read_clock_registers()
/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_6_0_d.h820 #define mmMCLK_PWRMGT_CNTL 0x0AE8 macro
Dgmc_7_1_d.h855 #define mmMCLK_PWRMGT_CNTL 0xae8 macro
Dgmc_8_1_d.h959 #define mmMCLK_PWRMGT_CNTL 0xae8 macro