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Searched refs:mmMMSCH_VFID_FIFO_TAIL_0_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dmmsch_v2_0.h164 #define mmMMSCH_VFID_FIFO_TAIL_0_BASE_IDX macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_3_0_0_offset.h152 #define mmMMSCH_VFID_FIFO_TAIL_0_BASE_IDX macro