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Searched refs:mmMMSCH_VF_MAILBOX_HOST (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dmmsch_v2_0.h65 #define mmMMSCH_VF_MAILBOX_HOST macro
Dvcn_v2_0.c1832 WREG32_SOC15(UVD, 0, mmMMSCH_VF_MAILBOX_HOST, 0x10000001); in vcn_v2_0_start_mmsch()
Dvcn_v2_5.c1190 WREG32_SOC15(VCN, 0, mmMMSCH_VF_MAILBOX_HOST, 0x10000001); in vcn_v2_5_mmsch_start()
Dvcn_v3_0.c1467 WREG32_SOC15(VCN, 0, mmMMSCH_VF_MAILBOX_HOST, param); in vcn_v3_0_start_sriov()
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_5_offset.h35 #define mmMMSCH_VF_MAILBOX_HOST macro
Dvcn_3_0_0_offset.h63 #define mmMMSCH_VF_MAILBOX_HOST macro