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Searched refs:mmMPLL_DQ_FUNC_CNTL (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_6_0_d.h1208 #define mmMPLL_DQ_FUNC_CNTL 0x0AF1 macro
Dgmc_7_1_d.h864 #define mmMPLL_DQ_FUNC_CNTL 0xaf1 macro
Dgmc_8_1_d.h968 #define mmMPLL_DQ_FUNC_CNTL 0xaf1 macro
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu7_hwmgr.c4811 cgs_read_register(hwmgr->device, mmMPLL_DQ_FUNC_CNTL); in smu7_read_clock_registers()