| /drivers/clk/ |
| D | clk-vt8500.c | 351 u32 *multiplier, u32 *prediv) in vt8500_find_pll_bits() argument
358 *multiplier = 0; in vt8500_find_pll_bits()
368 *multiplier = rate / (parent_rate / *prediv); in vt8500_find_pll_bits()
369 tclk = (parent_rate / *prediv) * *multiplier; in vt8500_find_pll_bits()
390 unsigned long parent_rate, u32 *multiplier, u32 *divisor1, in wm8650_find_pll_bits() argument
409 *multiplier = O1 / parent_rate; in wm8650_find_pll_bits()
417 if ((*multiplier < 3) || (*multiplier > 1023)) in wm8650_find_pll_bits()
453 u32 *filter, u32 *multiplier, u32 *divisor1, u32 *divisor2) in wm8750_find_pll_bits() argument
472 *multiplier = mul; in wm8750_find_pll_bits()
480 *multiplier = mul; in wm8750_find_pll_bits()
[all …]
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| D | clk-cs2000-cp.c | 203 u32 multiplier = lf_ratio ? 12 : 20; in cs2000_rate_to_ratio() local
211 ratio = (u64)rate_out << multiplier; in cs2000_rate_to_ratio()
220 u32 multiplier = lf_ratio ? 12 : 20; in cs2000_ratio_to_rate() local
230 return rate_out >> multiplier; in cs2000_ratio_to_rate()
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| /drivers/gpu/drm/msm/hdmi/ |
| D | hdmi_audio.c | 114 uint32_t n, cts, multiplier; in msm_hdmi_audio_update() local
123 multiplier = 4; in msm_hdmi_audio_update()
127 multiplier = 2; in msm_hdmi_audio_update()
130 multiplier = 1; in msm_hdmi_audio_update()
133 DBG("n=%u, cts=%u, multiplier=%u", n, cts, multiplier); in msm_hdmi_audio_update()
137 acr_pkt_ctrl |= HDMI_ACR_PKT_CTRL_N_MULTIPLIER(multiplier); in msm_hdmi_audio_update()
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| /drivers/video/fbdev/aty/ |
| D | mach64_ct.c | 121 u32 multiplier, divider, ras_multiplier, ras_divider, tmp; in aty_dsp_gt() local
125 multiplier = ((u32)pll->mclk_fb_div) * pll->vclk_post_div_real; in aty_dsp_gt()
143 multiplier = multiplier * par->lcd_width; in aty_dsp_gt()
152 while (((multiplier | divider) & 1) == 0) { in aty_dsp_gt()
153 multiplier = multiplier >> 1; in aty_dsp_gt()
158 tmp = ((multiplier * pll->fifo_size) << vshift) / divider; in aty_dsp_gt()
171 dsp_off = ((multiplier * (pll->fifo_size - 1)) << vshift) / divider - in aty_dsp_gt()
178 dsp_on = ((multiplier << vshift) + divider) / divider; in aty_dsp_gt()
190 dsp_on = dsp_off - (multiplier << vshift) / divider; in aty_dsp_gt()
195 dsp_xclks = ((multiplier << (vshift + 5)) + divider) / divider; in aty_dsp_gt()
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| /drivers/clk/meson/ |
| D | vid-pll-div.c | 30 unsigned int multiplier; member
38 .multiplier = (_fb), \
89 return DIV_ROUND_UP_ULL(parent_rate * div->multiplier, div->divider); in meson_vid_pll_div_recalc_rate()
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| /drivers/acpi/acpica/ |
| D | utmath.c | 48 acpi_ut_short_multiply(u64 multiplicand, u32 multiplier, u64 *out_product) in acpi_ut_short_multiply() argument
62 ACPI_MUL_64_BY_32(0, multiplicand_ovl.part.hi, multiplier, in acpi_ut_short_multiply()
65 ACPI_MUL_64_BY_32(0, multiplicand_ovl.part.lo, multiplier, in acpi_ut_short_multiply()
165 acpi_ut_short_multiply(u64 multiplicand, u32 multiplier, u64 *out_product) in acpi_ut_short_multiply() argument
173 *out_product = multiplicand * multiplier; in acpi_ut_short_multiply()
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| /drivers/video/fbdev/via/ |
| D | via_clock.h | 26 u16 multiplier; member
50 return ref_freq / pll.divisor * pll.multiplier; in get_pll_internal_frequency()
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| D | via_clock.c | 23 return (pll.multiplier << 8) in cle266_encode_pll()
32 | (pll.multiplier - 2); in k800_encode_pll()
39 | pll.multiplier; in vx855_encode_pll()
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| D | hw.c | 1383 cur.multiplier = clk / ((f0 / cur.divisor)>>cur.rshift); in get_pll_config()
1386 up.multiplier++; in get_pll_config()
1387 down.multiplier--; in get_pll_config()
1393 if (cur.multiplier < limits[i].multiplier_min) in get_pll_config()
1394 cur.multiplier = limits[i].multiplier_min; in get_pll_config()
1395 else if (cur.multiplier > limits[i].multiplier_max) in get_pll_config()
1396 cur.multiplier = limits[i].multiplier_max; in get_pll_config()
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_aux.c | 437 uint32_t multiplier = 0; in dce_aux_configure_timeout() local
451 multiplier = DEFAULT_AUX_ENGINE_MULT; in dce_aux_configure_timeout()
454 multiplier = 0; in dce_aux_configure_timeout()
459 multiplier = 1; in dce_aux_configure_timeout()
464 multiplier = 2; in dce_aux_configure_timeout()
469 multiplier = 3; in dce_aux_configure_timeout()
497 …UPDATE_SEQ_2(AUX_DPHY_RX_CONTROL1, AUX_RX_TIMEOUT_LEN, length, AUX_RX_TIMEOUT_LEN_MUL, multiplier); in dce_aux_configure_timeout()
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| /drivers/gpu/drm/msm/dsi/phy/ |
| D | dsi_phy_10nm.c | 121 u64 multiplier; in dsi_pll_calc_dec_frac() local
127 multiplier = 1 << FRAC_BITS; in dsi_pll_calc_dec_frac()
128 dec_multiple = div_u64(pll_freq * multiplier, divider); in dsi_pll_calc_dec_frac()
129 dec = div_u64_rem(dec_multiple, multiplier, &frac); in dsi_pll_calc_dec_frac()
427 u64 multiplier; in dsi_pll_10nm_vco_recalc_rate() local
445 multiplier = 1 << FRAC_BITS; in dsi_pll_10nm_vco_recalc_rate()
448 pll_freq += div_u64(tmp64, multiplier); in dsi_pll_10nm_vco_recalc_rate()
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| D | dsi_phy_7nm.c | 117 u64 multiplier; in dsi_pll_calc_dec_frac() local
123 multiplier = 1 << FRAC_BITS; in dsi_pll_calc_dec_frac()
124 dec_multiple = div_u64(pll_freq * multiplier, divider); in dsi_pll_calc_dec_frac()
125 dec = div_u64_rem(dec_multiple, multiplier, &frac); in dsi_pll_calc_dec_frac()
476 u64 multiplier; in dsi_pll_7nm_vco_recalc_rate() local
494 multiplier = 1 << FRAC_BITS; in dsi_pll_7nm_vco_recalc_rate()
497 pll_freq += div_u64(tmp64, multiplier); in dsi_pll_7nm_vco_recalc_rate()
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| D | dsi_phy_14nm.c | 207 u64 multiplier = BIT(20); in pll_14nm_dec_frac_calc() local
215 dec_start_multiple = div_u64(vco_clk_rate * multiplier, fref); in pll_14nm_dec_frac_calc()
216 dec_start = div_u64_rem(dec_start_multiple, multiplier, &div_frac_start); in pll_14nm_dec_frac_calc()
231 pll_comp_val = div_u64(pll_comp_val, multiplier); in pll_14nm_dec_frac_calc()
495 u64 vco_rate, multiplier = BIT(20); in dsi_pll_14nm_vco_recalc_rate() local
516 vco_rate += ((ref_clk * div_frac_start) / multiplier); in dsi_pll_14nm_vco_recalc_rate()
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| /drivers/net/ethernet/intel/ixgbe/ |
| D | ixgbe_dcb.c | 25 int min_credit, multiplier; in ixgbe_ieee_credits() local
36 multiplier = (min_credit / min_percent) + 1; in ixgbe_ieee_credits()
40 int val = min(bw[i] * multiplier, MAX_CREDIT_REFILL); in ixgbe_ieee_credits()
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| /drivers/iio/adc/ |
| D | cpcap-adc.c | 177 unsigned short multiplier; member
197 int multiplier; member
686 req->result *= phase_tbl[index].multiplier; in cpcap_adc_phase()
698 req->result *= phase_tbl[index].multiplier; in cpcap_adc_phase()
776 req->result *= conv_tbl[index].multiplier; in cpcap_adc_convert()
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| /drivers/scsi/be2iscsi/ |
| D | be_cmds.c | 712 u32 multiplier; in eq_delay_to_mult() local
715 multiplier = 0; in eq_delay_to_mult()
719 multiplier = 1023; in eq_delay_to_mult()
721 multiplier = (MAX_INTR_RATE - interrupt_rate) * round; in eq_delay_to_mult()
722 multiplier /= interrupt_rate; in eq_delay_to_mult()
723 multiplier = (multiplier + round / 2) / round; in eq_delay_to_mult()
724 multiplier = min(multiplier, (u32) 1023); in eq_delay_to_mult()
727 return multiplier; in eq_delay_to_mult()
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| /drivers/hwmon/ |
| D | ibmpex.c | 59 int multiplier; member
272 int mult = data->sensors[attr->index].multiplier; in ibmpex_show_sensor()
389 data->sensors[i].multiplier = in ibmpex_find_sensors()
398 data->sensors[i].multiplier = 1000; in ibmpex_find_sensors()
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| /drivers/media/pci/cobalt/ |
| D | cobalt-cpld.c | 123 struct multiplier { struct
131 static const struct multiplier multipliers[] = { argument
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| /drivers/gpu/drm/i915/display/ |
| D | intel_cx0_phy.c | 1875 unsigned int multiplier, tx_clk_div; in intel_c10pll_dump_hw_state() local
1889 multiplier = (REG_FIELD_GET8(C10_PLL3_MULTIPLIERH_MASK, hw_state->pll[3]) << 8 | in intel_c10pll_dump_hw_state()
1893 "multiplier: %u, tx_clk_div: %u.\n", multiplier, tx_clk_div); in intel_c10pll_dump_hw_state()
1911 u64 multiplier; in intel_c20_compute_hdmi_tmds_pll() local
1925 multiplier = div64_u64((vco_freq << 28), (REFCLK_38_4_MHZ >> 4)); in intel_c20_compute_hdmi_tmds_pll()
1926 mpll_multiplier = 2 * (multiplier >> 32); in intel_c20_compute_hdmi_tmds_pll()
1928 mpll_fracn_quot = (multiplier >> 16) & 0xFFFF; in intel_c20_compute_hdmi_tmds_pll()
1929 mpll_fracn_rem = multiplier & 0xFFFF; in intel_c20_compute_hdmi_tmds_pll()
2340 unsigned int multiplier, tx_clk_div, hdmi_div, refclk = 38400; in intel_c10pll_calc_port_clock() local
2349 multiplier = (REG_FIELD_GET8(C10_PLL3_MULTIPLIERH_MASK, pll_state->pll[3]) << 8 | in intel_c10pll_calc_port_clock()
[all …]
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| /drivers/media/v4l2-core/ |
| D | v4l2-common.c | 564 u32 multiplier; in v4l2_fraction_to_interval() local
576 multiplier = 10000000; in v4l2_fraction_to_interval()
577 while (numerator > ((u32)-1)/multiplier) { in v4l2_fraction_to_interval()
578 multiplier /= 2; in v4l2_fraction_to_interval()
582 return denominator ? numerator * multiplier / denominator : 0; in v4l2_fraction_to_interval()
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| /drivers/hid/ |
| D | hid-core.c | 1028 struct hid_field *multiplier) in hid_calculate_multiplier() argument
1031 __s32 v = *multiplier->value; in hid_calculate_multiplier()
1032 __s32 lmin = multiplier->logical_minimum; in hid_calculate_multiplier()
1033 __s32 lmax = multiplier->logical_maximum; in hid_calculate_multiplier()
1034 __s32 pmin = multiplier->physical_minimum; in hid_calculate_multiplier()
1035 __s32 pmax = multiplier->physical_maximum; in hid_calculate_multiplier()
1051 if (unlikely(multiplier->unit_exponent != 0)) { in hid_calculate_multiplier()
1054 multiplier->unit_exponent); in hid_calculate_multiplier()
1097 struct hid_field *multiplier) in hid_apply_multiplier() argument
1124 multiplier_collection = &hid->collection[multiplier->usage->collection_index]; in hid_apply_multiplier()
[all …]
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| /drivers/iio/accel/ |
| D | adxl355_core.c | 276 u32 multiplier; in adxl355_fill_3db_frequency_table() local
285 multiplier = adxl355_hpf_3db_multipliers[i]; in adxl355_fill_3db_frequency_table()
286 div = div64_u64_rem(mul_u64_u32_shr(odr, multiplier, 0), in adxl355_fill_3db_frequency_table()
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| /drivers/accessibility/speakup/ |
| D | varhandlers.c | 227 if (var_data->u.n.multiplier != 0) in spk_set_num_var()
228 val *= var_data->u.n.multiplier; in spk_set_num_var()
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| /drivers/soc/fsl/qe/ |
| D | qe.c | 210 int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier) in qe_setbrg() argument
218 divisor = qe_get_brg_clk() / (rate * multiplier); in qe_setbrg()
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| /drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_dpp_cm.c | 309 uint32_t multiplier) in dpp3_set_hdr_multiplier() argument
313 REG_UPDATE(CM_HDR_MULT_COEF, CM_HDR_MULT_COEF, multiplier); in dpp3_set_hdr_multiplier()
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