Searched refs:nitrox_read_csr (Results 1 – 5 of 5) sorted by relevance
/drivers/crypto/cavium/nitrox/ |
D | nitrox_isr.c | 47 value = nitrox_read_csr(ndev, NPS_CORE_INT); in clear_nps_core_err_intr() 59 pkt_int.value = nitrox_read_csr(ndev, NPS_PKT_INT); in clear_nps_pkt_err_intr() 65 value = nitrox_read_csr(ndev, offset); in clear_nps_pkt_err_intr() 71 value = nitrox_read_csr(ndev, offset); in clear_nps_pkt_err_intr() 81 value = nitrox_read_csr(ndev, offset); in clear_nps_pkt_err_intr() 89 value = nitrox_read_csr(ndev, offset); in clear_nps_pkt_err_intr() 94 value = nitrox_read_csr(ndev, offset); in clear_nps_pkt_err_intr() 104 value = nitrox_read_csr(ndev, offset); in clear_nps_pkt_err_intr() 115 value = nitrox_read_csr(ndev, POM_INT); in clear_pom_err_intr() 124 value = nitrox_read_csr(ndev, PEM0_INT); in clear_pem_err_intr() [all …]
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D | nitrox_hal.c | 74 pkt_in_ctl.value = nitrox_read_csr(ndev, offset); in reset_pkt_input_ring() 81 pkt_in_ctl.value = nitrox_read_csr(ndev, offset); in reset_pkt_input_ring() 89 pkt_in_cnts.value = nitrox_read_csr(ndev, offset); in reset_pkt_input_ring() 102 pkt_in_ctl.value = nitrox_read_csr(ndev, offset); in enable_pkt_input_ring() 109 pkt_in_ctl.value = nitrox_read_csr(ndev, offset); in enable_pkt_input_ring() 170 pkt_slc_ctl.value = nitrox_read_csr(ndev, offset); in reset_pkt_solicit_port() 178 pkt_slc_ctl.value = nitrox_read_csr(ndev, offset); in reset_pkt_solicit_port() 186 pkt_slc_cnts.value = nitrox_read_csr(ndev, offset); in reset_pkt_solicit_port() 211 pkt_slc_ctl.value = nitrox_read_csr(ndev, offset); in enable_pkt_solicit_port() 327 activity_stat.value = nitrox_read_csr(ndev, offset); in reset_aqm_ring() [all …]
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D | nitrox_main.c | 348 value += nitrox_read_csr(ndev, EMU_BIST_STATUSX(i)); in nitrox_bist_check() 349 value += nitrox_read_csr(ndev, EFL_CORE_BIST_REGX(i)); in nitrox_bist_check() 351 value += nitrox_read_csr(ndev, UCD_BIST_STATUS); in nitrox_bist_check() 352 value += nitrox_read_csr(ndev, NPS_CORE_BIST_REG); in nitrox_bist_check() 353 value += nitrox_read_csr(ndev, NPS_CORE_NPC_BIST_REG); in nitrox_bist_check() 354 value += nitrox_read_csr(ndev, NPS_PKT_SLC_BIST_REG); in nitrox_bist_check() 355 value += nitrox_read_csr(ndev, NPS_PKT_IN_BIST_REG); in nitrox_bist_check() 356 value += nitrox_read_csr(ndev, POM_BIST_REG); in nitrox_bist_check() 357 value += nitrox_read_csr(ndev, BMI_BIST_REG); in nitrox_bist_check() 358 value += nitrox_read_csr(ndev, EFL_TOP_BIST_STAT); in nitrox_bist_check() [all …]
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D | nitrox_mbx.c | 44 return nitrox_read_csr(ndev, reg_addr); in pf2vf_read_mbox() 133 value = nitrox_read_csr(ndev, reg_addr); in nitrox_pf2vf_mbox_handler() 156 value = nitrox_read_csr(ndev, reg_addr); in nitrox_pf2vf_mbox_handler()
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D | nitrox_dev.h | 275 static inline u64 nitrox_read_csr(struct nitrox_device *ndev, u64 offset) in nitrox_read_csr() function
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