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Searched refs:pPhyReg (Results 1 – 6 of 6) sorted by relevance

/drivers/staging/rtl8723bs/hal/
Drtl8723b_rf6052.c86 struct bb_register_def *pPhyReg; in phy_RF6052_Config_ParaFile() local
95 pPhyReg = &pHalData->PHYRegDef[eRFPath]; in phy_RF6052_Config_ParaFile()
100 u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); in phy_RF6052_Config_ParaFile()
103 u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16); in phy_RF6052_Config_ParaFile()
108 PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1); in phy_RF6052_Config_ParaFile()
112 PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); in phy_RF6052_Config_ParaFile()
116 …PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 825… in phy_RF6052_Config_ParaFile()
119 …PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255… in phy_RF6052_Config_ParaFile()
134 PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); in phy_RF6052_Config_ParaFile()
137 PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue); in phy_RF6052_Config_ParaFile()
Drtl8723b_phycfg.c98 struct bb_register_def *pPhyReg = &pHalData->PHYRegDef[eRFPath]; in phy_RFSerialRead_8723B() local
139 retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi|MaskforPhySet, bLSSIReadBackData); in phy_RFSerialRead_8723B()
142 retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack|MaskforPhySet, bLSSIReadBackData); in phy_RFSerialRead_8723B()
194 struct bb_register_def *pPhyReg = &pHalData->PHYRegDef[eRFPath]; in phy_RFSerialWrite_8723B() local
211 PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); in phy_RFSerialWrite_8723B()
/drivers/staging/rtl8192e/rtl8192e/
Dr8190P_rtl8256.c55 struct bb_reg_definition *pPhyReg; in rtl92e_config_rf() local
67 pPhyReg = &priv->phy_reg_def[eRFPath]; in rtl92e_config_rf()
71 u4RegValue = rtl92e_get_bb_reg(dev, pPhyReg->rfintfs, in rtl92e_config_rf()
75 u4RegValue = rtl92e_get_bb_reg(dev, pPhyReg->rfintfs, in rtl92e_config_rf()
80 rtl92e_set_bb_reg(dev, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1); in rtl92e_config_rf()
82 rtl92e_set_bb_reg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); in rtl92e_config_rf()
84 rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, in rtl92e_config_rf()
86 rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, in rtl92e_config_rf()
115 rtl92e_set_bb_reg(dev, pPhyReg->rfintfs, bRFSI_RFENV, in rtl92e_config_rf()
119 rtl92e_set_bb_reg(dev, pPhyReg->rfintfs, in rtl92e_config_rf()
Dr8192E_phy.c63 struct bb_reg_definition *pPhyReg = &priv->phy_reg_def[eRFPath]; in _rtl92e_phy_rf_read() local
70 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, in _rtl92e_phy_rf_read()
77 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, in _rtl92e_phy_rf_read()
84 rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, bLSSIReadAddress, in _rtl92e_phy_rf_read()
86 rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x0); in _rtl92e_phy_rf_read()
87 rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x1); in _rtl92e_phy_rf_read()
91 ret = rtl92e_get_bb_reg(dev, pPhyReg->rfLSSIReadBack, in _rtl92e_phy_rf_read()
96 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, bMaskDWord, in _rtl92e_phy_rf_read()
110 struct bb_reg_definition *pPhyReg = &priv->phy_reg_def[eRFPath]; in _rtl92e_phy_rf_write() local
118 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, in _rtl92e_phy_rf_write()
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/drivers/staging/rtl8192u/
Dr8190_rtl8256.c116 BB_REGISTER_DEFINITION_T *pPhyReg; in phy_rf8256_config_para_file() local
128 pPhyReg = &priv->PHYRegDef[eRFPath]; in phy_rf8256_config_para_file()
137 u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV); in phy_rf8256_config_para_file()
141 u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV << 16); in phy_rf8256_config_para_file()
146 rtl8192_setBBreg(dev, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1); in phy_rf8256_config_para_file()
149 rtl8192_setBBreg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); in phy_rf8256_config_para_file()
152 …rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 0 to 4 bits for Z-se… in phy_rf8256_config_para_file()
153 …rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for Z-seri… in phy_rf8256_config_para_file()
207 rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); in phy_rf8256_config_para_file()
211 rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue); in phy_rf8256_config_para_file()
Dr819xU_phy.c131 BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[e_rfpath]; in rtl8192_phy_RFSerialRead() local
133 rtl8192_setBBreg(dev, pPhyReg->rfLSSIReadBack, bLSSIReadBackData, 0); in rtl8192_phy_RFSerialRead()
142 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, in rtl8192_phy_RFSerialRead()
151 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, in rtl8192_phy_RFSerialRead()
165 rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadAddress, in rtl8192_phy_RFSerialRead()
168 rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x0); in rtl8192_phy_RFSerialRead()
169 rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x1); in rtl8192_phy_RFSerialRead()
174 ret = rtl8192_QueryBBReg(dev, pPhyReg->rfLSSIReadBack, in rtl8192_phy_RFSerialRead()
181 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, in rtl8192_phy_RFSerialRead()
215 BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[e_rfpath]; in rtl8192_phy_RFSerialWrite() local
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