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Searched refs:p_rate (Results 1 – 5 of 5) sorted by relevance

/drivers/clk/rockchip/
Dclk.c185 unsigned long p_rate, p_parent_rate; in rockchip_fractional_approximation() local
188 p_rate = clk_hw_get_rate(clk_hw_get_parent(hw)); in rockchip_fractional_approximation()
189 if ((rate * 20 > p_rate) && (p_rate % rate != 0)) { in rockchip_fractional_approximation()
/drivers/clk/qcom/
Dclk-pll.c141 clk_pll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long p_rate) in clk_pll_set_rate() argument
Dgcc-ipq4019.c129 unsigned long *p_rate) in clk_cpu_div_round_rate() argument
140 *p_rate = clk_hw_get_rate(p_hw); in clk_cpu_div_round_rate()
/drivers/clk/tegra/
Dclk-tegra210.c1485 unsigned long cf, p_rate; in tegra210_pll_fixed_mdiv_cfg() local
1507 p_rate = rate * p; in tegra210_pll_fixed_mdiv_cfg()
1508 if (p_rate > params->vco_max) in tegra210_pll_fixed_mdiv_cfg()
1509 p_rate = params->vco_max; in tegra210_pll_fixed_mdiv_cfg()
1511 cfg->n = p_rate / cf; in tegra210_pll_fixed_mdiv_cfg()
1516 unsigned long rem = p_rate - cf * cfg->n; in tegra210_pll_fixed_mdiv_cfg()
/drivers/clk/
Dclk.c2932 unsigned long p_rate = 0; in clk_core_set_parent_nolock() local
2961 p_rate = parent->rate; in clk_core_set_parent_nolock()
2969 ret = __clk_speculate_rates(core, p_rate); in clk_core_set_parent_nolock()