| /drivers/base/ |
| D | pinctrl.c | 28 dev->pins = devm_kzalloc(dev, sizeof(*(dev->pins)), GFP_KERNEL); in pinctrl_bind_pins()
29 if (!dev->pins) in pinctrl_bind_pins()
32 dev->pins->p = devm_pinctrl_get(dev); in pinctrl_bind_pins()
33 if (IS_ERR(dev->pins->p)) { in pinctrl_bind_pins()
35 ret = PTR_ERR(dev->pins->p); in pinctrl_bind_pins()
39 dev->pins->default_state = pinctrl_lookup_state(dev->pins->p, in pinctrl_bind_pins()
41 if (IS_ERR(dev->pins->default_state)) { in pinctrl_bind_pins()
47 dev->pins->init_state = pinctrl_lookup_state(dev->pins->p, in pinctrl_bind_pins()
49 if (IS_ERR(dev->pins->init_state)) { in pinctrl_bind_pins()
53 ret = pinctrl_select_state(dev->pins->p, in pinctrl_bind_pins()
[all …]
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| /drivers/video/fbdev/matrox/ |
| D | matroxfb_misc.c | 391 static void get_pins(unsigned char __iomem* pins, struct matrox_bios* bd) { in get_pins() argument
392 unsigned int b0 = readb(pins); in get_pins()
394 if (b0 == 0x2E && readb(pins+1) == 0x41) { in get_pins()
395 unsigned int pins_len = readb(pins+2); in get_pins()
398 unsigned char* dst = bd->pins; in get_pins()
408 cksum += *dst++ = readb(pins+i); in get_pins()
414 } else if (b0 == 0x40 && readb(pins+1) == 0x00) { in get_pins()
416 unsigned char* dst = bd->pins; in get_pins()
421 *dst++ = readb(pins+i); in get_pins()
535 switch (bd->pins[22]) { in parse_pins1()
[all …]
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| /drivers/pinctrl/samsung/ |
| D | pinctrl-exynos.h | 54 #define EXYNOS_PIN_BANK_EINTN(pins, reg, id) \ argument
58 .nr_pins = pins, \
63 #define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs) \ argument
67 .nr_pins = pins, \
73 #define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs) \ argument
77 .nr_pins = pins, \
83 #define EXYNOS5433_PIN_BANK_EINTG(pins, reg, id, offs) \ argument
87 .nr_pins = pins, \
93 #define EXYNOS5433_PIN_BANK_EINTW(pins, reg, id, offs) \ argument
97 .nr_pins = pins, \
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| D | pinctrl-s3c64xx.c | 96 #define PIN_BANK_4BIT(pins, reg, id) \ argument
100 .nr_pins = pins, \
105 #define PIN_BANK_4BIT_EINTG(pins, reg, id, eoffs) \ argument
109 .nr_pins = pins, \
112 .eint_mask = (1 << (pins)) - 1, \
117 #define PIN_BANK_4BIT_EINTW(pins, reg, id, eoffs, emask) \ argument
121 .nr_pins = pins, \
129 #define PIN_BANK_4BIT2_EINTG(pins, reg, id, eoffs) \ argument
133 .nr_pins = pins, \
136 .eint_mask = (1 << (pins)) - 1, \
[all …]
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| /drivers/auxdisplay/ |
| D | hd44780.c | 38 struct gpio_desc *pins[PIN_NUM]; member
46 if (hd->pins[PIN_CTRL_BL]) in hd44780_backlight()
47 gpiod_set_value_cansleep(hd->pins[PIN_CTRL_BL], on); in hd44780_backlight()
55 gpiod_set_value_cansleep(hd->pins[PIN_CTRL_E], 1); in hd44780_strobe_gpio()
60 gpiod_set_value_cansleep(hd->pins[PIN_CTRL_E], 0); in hd44780_strobe_gpio()
71 n = hd->pins[PIN_CTRL_RW] ? 10 : 9; in hd44780_write_gpio8()
74 gpiod_set_array_value_cansleep(n, &hd->pins[PIN_DATA0], NULL, values); in hd44780_write_gpio8()
88 n = hd->pins[PIN_CTRL_RW] ? 6 : 5; in hd44780_write_gpio4()
91 gpiod_set_array_value_cansleep(n, &hd->pins[PIN_DATA4], NULL, values); in hd44780_write_gpio4()
100 gpiod_set_array_value_cansleep(n, &hd->pins[PIN_DATA4], NULL, values); in hd44780_write_gpio4()
[all …]
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| D | panel.c | 215 } pins; member
712 if (lcd.pins.bl == PIN_NONE) in lcd_backlight()
861 lcd.pins.e = PIN_STROBE; in lcd_init()
862 lcd.pins.rs = PIN_AUTOLF; in lcd_init()
873 lcd.pins.bl = PIN_AUTOLF; in lcd_init()
874 lcd.pins.cl = PIN_STROBE; in lcd_init()
875 lcd.pins.da = PIN_D0; in lcd_init()
886 lcd.pins.e = PIN_AUTOLF; in lcd_init()
887 lcd.pins.rs = PIN_SELECP; in lcd_init()
888 lcd.pins.rw = PIN_INITP; in lcd_init()
[all …]
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| /drivers/pinctrl/ |
| D | pinctrl-gemini.c | 78 const unsigned int *pins; member
709 .pins = gnd_3512_pins,
714 .pins = dram_3512_pins,
720 .pins = rtc_3512_pins,
725 .pins = power_3512_pins,
730 .pins = system_3512_pins,
735 .pins = vcontrol_3512_pins,
740 .pins = ice_3512_pins,
746 .pins = ide_3512_pins,
755 .pins = sata_3512_pins,
[all …]
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| D | pinctrl-artpec6.c | 59 struct pinctrl_pin_desc *pins; member
69 const unsigned int *pins; member
215 .pins = cpuclkout_pins0,
221 .pins = udlclkout_pins0,
227 .pins = i2c1_pins0,
233 .pins = i2c2_pins0,
239 .pins = i2c3_pins0,
245 .pins = i2s0_pins0,
251 .pins = i2s1_pins0,
257 .pins = i2srefclk_pins0,
[all …]
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| D | core.c | 152 pin = pctldev->desc->pins[i].number; in pin_get_from_name()
184 const struct pinctrl_pin_desc *pins, in pinctrl_free_pindescs() argument
193 pins[i].number); in pinctrl_free_pindescs()
196 pins[i].number); in pinctrl_free_pindescs()
252 const struct pinctrl_pin_desc *pins, in pinctrl_register_pins() argument
259 ret = pinctrl_register_one_pin(pctldev, &pins[i]); in pinctrl_register_pins()
284 if (range->pins) in gpio_to_pin()
285 return range->pins[offset]; in gpio_to_pin()
458 const unsigned **pins, unsigned *num_pins) in pinctrl_get_group_pins() argument
470 return pctlops->get_group_pins(pctldev, gs, pins, num_pins); in pinctrl_get_group_pins()
[all …]
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| D | pinctrl-at91-pio4.c | 136 struct atmel_pin **pins; member
187 struct atmel_pin *pin = atmel_pioctrl->pins[d->hwirq]; in atmel_gpio_irq_set_type()
229 struct atmel_pin *pin = atmel_pioctrl->pins[d->hwirq]; in atmel_gpio_irq_mask()
238 struct atmel_pin *pin = atmel_pioctrl->pins[d->hwirq]; in atmel_gpio_irq_unmask()
322 struct atmel_pin *pin = atmel_pioctrl->pins[offset]; in atmel_gpio_direction_input()
337 struct atmel_pin *pin = atmel_pioctrl->pins[offset]; in atmel_gpio_get()
377 struct atmel_pin *pin = atmel_pioctrl->pins[offset]; in atmel_gpio_direction_output()
396 struct atmel_pin *pin = atmel_pioctrl->pins[offset]; in atmel_gpio_set()
452 unsigned int bank = atmel_pioctrl->pins[pin_id]->bank; in atmel_pin_config_read()
453 unsigned int line = atmel_pioctrl->pins[pin_id]->line; in atmel_pin_config_read()
[all …]
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| D | pinctrl-axp209.c | 50 const struct pinctrl_pin_desc *pins; member
89 .pins = axp209_pins,
98 .pins = axp22x_pins,
105 .pins = axp22x_pins,
342 const unsigned int **pins, unsigned int *num_pins) in axp20x_group_pins() argument
346 *pins = (unsigned int *)&pctl->desc->pins[selector]; in axp20x_group_pins()
357 return pctl->desc->pins[selector].name; in axp20x_group_name()
371 const struct pinctrl_pin_desc *pins) in axp20x_funcs_groups_from_mask() argument
387 *group = pins[bit].name; in axp20x_funcs_groups_from_mask()
421 pctl->funcs[i].groups[pin] = pctl->desc->pins[pin].name; in axp20x_build_funcs_groups()
[all …]
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| /drivers/gpu/drm/mgag200/ |
| D | mgag200_g200.c | 282 const unsigned char *pins; in mgag200_g200_interpret_bios() local
302 pins = bios + offset; in mgag200_g200_interpret_bios()
303 if (pins[0] == 0x2e && pins[1] == 0x41) { in mgag200_g200_interpret_bios()
304 version = pins[5]; in mgag200_g200_interpret_bios()
305 pins_len = pins[2]; in mgag200_g200_interpret_bios()
308 pins_len = pins[0] + (pins[1] << 8); in mgag200_g200_interpret_bios()
329 tmp = pins[24] + (pins[25] << 8); in mgag200_g200_interpret_bios()
334 if (pins[41] != 0xff) in mgag200_g200_interpret_bios()
335 g200->pclk_max = (pins[41] + 100) * 1000; in mgag200_g200_interpret_bios()
338 if (pins[36] != 0xff) in mgag200_g200_interpret_bios()
[all …]
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| /drivers/pinctrl/spear/ |
| D | pinctrl-spear1340.c | 261 .pins = pads_as_gpio_pins,
294 .pins = fsmc_8bit_pins,
323 .pins = fsmc_16bit_pins,
354 .pins = fsmc_pnor_pins,
392 .pins = keyboard_row_col_pins,
421 .pins = keyboard_col5_pins,
454 .pins = spdif_in_pins,
490 .pins = spdif_out_pins,
530 .pins = gpt_0_1_pins,
566 .pins = pwm0_pins,
[all …]
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| D | pinctrl-spear3xx.c | 41 .pins = firda_pins,
74 .pins = i2c_pins,
107 .pins = ssp_cs_pins,
140 .pins = ssp_pins,
174 .pins = mii_pins,
207 .pins = gpio0_pin0_pins,
233 .pins = gpio0_pin1_pins,
259 .pins = gpio0_pin2_pins,
285 .pins = gpio0_pin3_pins,
311 .pins = gpio0_pin4_pins,
[all …]
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| D | pinctrl-spear320.c | 501 .pins = clcd_pins,
584 .pins = emi_pins,
630 .pins = fsmc_8bit_pins,
677 .pins = fsmc_16bit_pins,
723 .pins = spp_pins,
768 .pins = sdhci_led_pins,
871 .pins = sdhci_cd_12_pins,
877 .pins = sdhci_cd_51_pins,
933 .pins = i2s_pins,
979 .pins = uart1_pins,
[all …]
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| /drivers/pinctrl/intel/ |
| D | Kconfig | 12 Most pins are usually muxed to some other functionality by firmware,
22 allows configuring of SoC pins and using them as GPIOs.
29 provides an interface that allows configuring of PCH pins and
45 of Intel Alder Lake PCH pins and using them as GPIOs.
52 configuring of SoC pins and using them as GPIOs.
59 of Intel Cannon Lake PCH pins and using them as GPIOs.
66 of Intel Cedar Fork PCH pins and using them as GPIOs.
73 of Intel Denverton SoC pins and using them as GPIOs.
80 of Intel Elkhart Lake SoC pins and using them as GPIOs.
87 of Intel Emmitsburg pins and using them as GPIOs.
[all …]
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| /drivers/pinctrl/renesas/ |
| D | pinctrl-rza2.c | 46 struct pinctrl_pin_desc *pins; member
283 struct pinctrl_pin_desc *pins; in rza2_pinctrl_register() local
287 pins = devm_kcalloc(priv->dev, priv->npins, sizeof(*pins), GFP_KERNEL); in rza2_pinctrl_register()
288 if (!pins) in rza2_pinctrl_register()
291 priv->pins = pins; in rza2_pinctrl_register()
292 priv->desc.pins = pins; in rza2_pinctrl_register()
296 pins[i].number = i; in rza2_pinctrl_register()
297 pins[i].name = rza2_gpio_names[i]; in rza2_pinctrl_register()
333 unsigned int *pins, *psel_val; in rza2_dt_node_to_map() local
346 pins = devm_kcalloc(priv->dev, npins, sizeof(*pins), GFP_KERNEL); in rza2_dt_node_to_map()
[all …]
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| D | pinctrl-rzv2m.c | 118 struct pinctrl_pin_desc *pins; member
168 int *pins; in rzv2m_pinctrl_set_mux() local
178 pins = group->pins; in rzv2m_pinctrl_set_mux()
182 RZV2M_PIN_ID_TO_PORT(pins[i]), RZV2M_PIN_ID_TO_PIN(pins[i]), in rzv2m_pinctrl_set_mux()
184 rzv2m_pinctrl_set_pfc_mode(pctrl, RZV2M_PIN_ID_TO_PORT(pins[i]), in rzv2m_pinctrl_set_mux()
185 RZV2M_PIN_ID_TO_PIN(pins[i]), psel_val[i]); in rzv2m_pinctrl_set_mux()
223 unsigned int *pins, *psel_val; in rzv2m_dt_subnode_to_map() local
296 pins = devm_kcalloc(pctrl->dev, num_pinmux, sizeof(*pins), GFP_KERNEL); in rzv2m_dt_subnode_to_map()
300 if (!pins || !psel_val || !pin_fn) { in rzv2m_dt_subnode_to_map()
312 pins[i] = value & MUX_PIN_ID_MASK; in rzv2m_dt_subnode_to_map()
[all …]
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| /drivers/pinctrl/visconti/ |
| D | pinctrl-common.c | 42 const struct visconti_desc_pin *pin = &priv->devdata->pins[_pin]; in visconti_pin_config_set()
128 const unsigned int *pins; in visconti_pin_config_group_set() local
132 pins = priv->devdata->groups[selector].pins; in visconti_pin_config_group_set()
139 ret = visconti_pin_config_set(pctldev, pins[i], in visconti_pin_config_group_set()
172 const unsigned int **pins, in visconti_get_group_pins() argument
177 *pins = priv->devdata->groups[selector].pins; in visconti_get_group_pins()
284 struct pinctrl_pin_desc *pins; in visconti_pinctrl_probe() local
301 pins = devm_kcalloc(dev, devdata->nr_pins, in visconti_pinctrl_probe()
302 sizeof(*pins), GFP_KERNEL); in visconti_pinctrl_probe()
303 if (!pins) in visconti_pinctrl_probe()
[all …]
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| /drivers/pinctrl/bcm/ |
| D | pinctrl-bcm4908.c | 254 const struct bcm4908_pinctrl_pin_setup *pins; member
435 lsb |= group->pins[i].number; in bcm4908_pinctrl_set_mux()
436 lsb |= group->pins[i].function << BCM4908_TEST_PORT_LSB_PINMUX_DATA_SHIFT; in bcm4908_pinctrl_set_mux()
475 struct pinctrl_pin_desc *pins; in bcm4908_pinctrl_probe() local
503 pins = devm_kcalloc(dev, BCM4908_NUM_PINS, sizeof(*pins), GFP_KERNEL); in bcm4908_pinctrl_probe()
504 if (!pins) in bcm4908_pinctrl_probe()
507 pins[i].number = i; in bcm4908_pinctrl_probe()
508 pins[i].name = pin_names[i]; in bcm4908_pinctrl_probe()
510 pctldesc->pins = pins; in bcm4908_pinctrl_probe()
524 int *pins; in bcm4908_pinctrl_probe() local
[all …]
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| /drivers/pinctrl/mediatek/ |
| D | pinctrl-moore.c | 64 int pin = grp->pins[i]; in mtk_pinmux_set_mux()
66 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; in mtk_pinmux_set_mux()
84 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; in mtk_pinmux_gpio_request_enable()
99 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; in mtk_pinmux_gpio_set_direction()
115 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; in mtk_pinconf_get()
254 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; in mtk_pinconf_set()
401 const unsigned int *pins; in mtk_pinconf_group_get() local
405 ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins); in mtk_pinconf_group_get()
410 if (mtk_pinconf_get(pctldev, pins[i], config)) in mtk_pinconf_group_get()
427 const unsigned int *pins; in mtk_pinconf_group_set() local
[all …]
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| D | pinctrl-paris.c | 110 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; in mtk_pinmux_gpio_request_enable()
123 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; in mtk_pinmux_gpio_set_direction()
140 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; in mtk_pinconf_get()
269 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; in mtk_pinconf_set()
371 const struct mtk_pin_desc *pin = hw->soc->pins + pin_num; in mtk_pctrl_find_function_by_pin()
389 const struct mtk_pin_desc *pin = hw->soc->pins + i; in mtk_pctrl_is_function_valid()
448 struct property *pins; in mtk_pctrl_dt_subnode_to_map() local
451 pins = of_find_property(node, "pinmux", NULL); in mtk_pctrl_dt_subnode_to_map()
452 if (!pins) { in mtk_pctrl_dt_subnode_to_map()
466 num_pins = pins->length / sizeof(u32); in mtk_pctrl_dt_subnode_to_map()
[all …]
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| /drivers/net/ethernet/intel/i40e/ |
| D | i40e_ptp.c | 142 struct i40e_ptp_pins_settings *pins);
540 struct i40e_ptp_pins_settings pins; in i40e_ptp_enable_pin() local
548 pins.sdp3_2 = pf->ptp_pins->sdp3_2; in i40e_ptp_enable_pin()
549 pins.sdp3_3 = pf->ptp_pins->sdp3_3; in i40e_ptp_enable_pin()
550 pins.gpio_4 = pf->ptp_pins->gpio_4; in i40e_ptp_enable_pin()
565 pin = &pins.sdp3_2; in i40e_ptp_enable_pin()
568 pin = &pins.sdp3_3; in i40e_ptp_enable_pin()
571 pin = &pins.gpio_4; in i40e_ptp_enable_pin()
579 pins.sdp3_2 = off; in i40e_ptp_enable_pin()
580 pins.sdp3_3 = off; in i40e_ptp_enable_pin()
[all …]
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| /drivers/pinctrl/qcom/ |
| D | pinctrl-qdf2xxx.c | 34 struct pinctrl_pin_desc *pins; in qdf2xxx_pinctrl_probe() local
78 pins = devm_kcalloc(&pdev->dev, num_gpios, in qdf2xxx_pinctrl_probe()
84 if (!pinctrl || !pins || !groups || !names) in qdf2xxx_pinctrl_probe()
92 pins[i].number = i; in qdf2xxx_pinctrl_probe()
93 groups[i].grp.pins = &pins[i].number; in qdf2xxx_pinctrl_probe()
102 pins[gpio].name = names[i]; in qdf2xxx_pinctrl_probe()
127 pinctrl->pins = pins; in qdf2xxx_pinctrl_probe()
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| /drivers/pinctrl/freescale/ |
| D | pinctrl-imx1-core.c | 192 const unsigned int **pins, in imx1_get_group_pins() argument
201 *pins = info->groups[selector].pin_ids; in imx1_get_group_pins()
271 pin_get_name(pctldev, grp->pins[i].pin_id); in imx1_dt_node_to_map()
272 new_map[j].data.configs.configs = &grp->pins[i].config; in imx1_dt_node_to_map()
303 const struct imx1_pin *pins; in imx1_pmx_set() local
311 pins = info->groups[group].pins; in imx1_pmx_set()
314 WARN_ON(!pins || !npins); in imx1_pmx_set()
320 unsigned int mux = pins[i].mux_id; in imx1_pmx_set()
321 unsigned int pin_id = pins[i].pin_id; in imx1_pmx_set()
440 name = pin_get_name(pctldev, grp->pins[i].pin_id); in imx1_pinconf_group_dbg_show()
[all …]
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