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Searched refs:plat_data (Results 1 – 25 of 53) sorted by relevance

123

/drivers/gpu/drm/exynos/
Dexynos_dp.c45 struct analogix_dp_plat_data plat_data; member
48 static int exynos_dp_crtc_clock_enable(struct analogix_dp_plat_data *plat_data, in exynos_dp_crtc_clock_enable() argument
51 struct exynos_dp_device *dp = to_dp(plat_data); in exynos_dp_crtc_clock_enable()
62 static int exynos_dp_poweron(struct analogix_dp_plat_data *plat_data) in exynos_dp_poweron() argument
64 return exynos_dp_crtc_clock_enable(plat_data, true); in exynos_dp_poweron()
67 static int exynos_dp_poweroff(struct analogix_dp_plat_data *plat_data) in exynos_dp_poweroff() argument
69 return exynos_dp_crtc_clock_enable(plat_data, false); in exynos_dp_poweroff()
72 static int exynos_dp_get_modes(struct analogix_dp_plat_data *plat_data, in exynos_dp_get_modes() argument
75 struct exynos_dp_device *dp = to_dp(plat_data); in exynos_dp_get_modes()
79 if (dp->plat_data.panel) in exynos_dp_get_modes()
[all …]
/drivers/net/ethernet/cadence/
Dmacb_pci.c33 struct macb_platform_data plat_data; in macb_probe() local
59 memset(&plat_data, 0, sizeof(plat_data)); in macb_probe()
62 plat_data.pclk = clk_register_fixed_rate(&pdev->dev, "pclk", NULL, 0, in macb_probe()
64 if (IS_ERR(plat_data.pclk)) { in macb_probe()
65 err = PTR_ERR(plat_data.pclk); in macb_probe()
69 plat_data.hclk = clk_register_fixed_rate(&pdev->dev, "hclk", NULL, 0, in macb_probe()
71 if (IS_ERR(plat_data.hclk)) { in macb_probe()
72 err = PTR_ERR(plat_data.hclk); in macb_probe()
84 plat_info.data = &plat_data; in macb_probe()
85 plat_info.size_data = sizeof(plat_data); in macb_probe()
[all …]
/drivers/ata/
Dahci_seattle.c83 struct seattle_plat_data *plat_data = hpriv->plat_data; in seattle_transmit_led_message() local
95 val = ioread32(plat_data->sgpio_ctrl); in seattle_transmit_led_message()
111 iowrite32(val, plat_data->sgpio_ctrl); in seattle_transmit_led_message()
127 struct seattle_plat_data *plat_data; in ahci_seattle_get_port_info() local
130 plat_data = devm_kzalloc(dev, sizeof(*plat_data), GFP_KERNEL); in ahci_seattle_get_port_info()
131 if (!plat_data) in ahci_seattle_get_port_info()
134 plat_data->sgpio_ctrl = devm_platform_ioremap_resource(pdev, 1); in ahci_seattle_get_port_info()
135 if (IS_ERR(plat_data->sgpio_ctrl)) in ahci_seattle_get_port_info()
138 val = ioread32(plat_data->sgpio_ctrl); in ahci_seattle_get_port_info()
146 hpriv->plat_data = plat_data; in ahci_seattle_get_port_info()
Dahci_dwc.c127 struct ahci_dwc_host_priv *dpriv = hpriv->plat_data; in ahci_bt1_init()
177 hpriv->plat_data = (void *)dpriv; in ahci_dwc_get_resources()
185 struct ahci_dwc_host_priv *dpriv = hpriv->plat_data; in ahci_dwc_check_cap()
228 struct ahci_dwc_host_priv *dpriv = hpriv->plat_data; in ahci_dwc_init_timer()
262 struct ahci_dwc_host_priv *dpriv = hpriv->plat_data; in ahci_dwc_init_dmacr()
307 struct ahci_dwc_host_priv *dpriv = hpriv->plat_data; in ahci_dwc_init_host()
342 struct ahci_dwc_host_priv *dpriv = hpriv->plat_data; in ahci_dwc_reinit_host()
374 struct ahci_dwc_host_priv *dpriv = hpriv->plat_data; in ahci_dwc_clear_host()
Dahci_st.c57 struct st_ahci_drv_data *drv_data = hpriv->plat_data; in st_ahci_deassert_resets()
90 struct st_ahci_drv_data *drv_data = hpriv->plat_data; in st_ahci_host_stop()
106 struct st_ahci_drv_data *drv_data = hpriv->plat_data; in st_ahci_probe_resets()
158 hpriv->plat_data = drv_data; in st_ahci_probe()
185 struct st_ahci_drv_data *drv_data = hpriv->plat_data; in st_ahci_suspend()
Dahci_mtk.c48 struct mtk_ahci_plat *plat = hpriv->plat_data; in mtk_ahci_platform_resets()
106 struct mtk_ahci_plat *plat = hpriv->plat_data; in mtk_ahci_parse_property()
140 hpriv->plat_data = plat; in mtk_ahci_probe()
Dahci_brcm.c120 struct brcm_ahci_priv *priv = hpriv->plat_data; in brcm_sata_alpm_init()
254 struct brcm_ahci_priv *priv = hpriv->plat_data; in brcm_ahci_read_id()
346 struct brcm_ahci_priv *priv = hpriv->plat_data; in brcm_ahci_suspend()
366 struct brcm_ahci_priv *priv = hpriv->plat_data; in brcm_ahci_resume()
473 hpriv->plat_data = priv; in brcm_ahci_probe()
551 struct brcm_ahci_priv *priv = hpriv->plat_data; in brcm_ahci_remove()
Dahci_tegra.c184 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra_ahci_handle_quirks()
196 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra124_ahci_init()
240 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra_ahci_power_on()
282 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra_ahci_power_off()
299 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra_ahci_controller_init()
528 hpriv->plat_data = tegra; in tegra_ahci_probe()
/drivers/iommu/
Dmtk_iommu.c261 const struct mtk_iommu_plat_data *plat_data; member
383 writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0, base + data->plat_data->inv_sel_reg); in mtk_iommu_tlb_flush_all()
417 check_pm_status = !MTK_IOMMU_HAS_FLAG(data->plat_data, PM_CLK_AO); in mtk_iommu_tlb_flush_range_sync()
429 base + data->plat_data->inv_sel_reg); in mtk_iommu_tlb_flush_range_sync()
462 const struct mtk_iommu_plat_data *plat_data = data->plat_data; in mtk_iommu_isr() local
480 if (MTK_IOMMU_HAS_FLAG(plat_data, IOVA_34_EN)) { in mtk_iommu_isr()
488 if (MTK_IOMMU_IS_TYPE(plat_data, MTK_IOMMU_TYPE_MM)) { in mtk_iommu_isr()
489 if (MTK_IOMMU_HAS_FLAG(plat_data, HAS_SUB_COMM_2BITS)) { in mtk_iommu_isr()
493 } else if (MTK_IOMMU_HAS_FLAG(plat_data, HAS_SUB_COMM_3BITS)) { in mtk_iommu_isr()
497 } else if (MTK_IOMMU_HAS_FLAG(plat_data, INT_ID_PORT_WIDTH_6)) { in mtk_iommu_isr()
[all …]
/drivers/video/fbdev/mmp/panel/
Dtpo_tj032md01bw.c77 struct tpohvga_plat_data *plat = panel->plat_data; in tpohvga_onoff()
130 struct tpohvga_plat_data *plat_data; in tpohvga_probe() local
147 plat_data = kzalloc(sizeof(*plat_data), GFP_KERNEL); in tpohvga_probe()
148 if (plat_data == NULL) in tpohvga_probe()
151 plat_data->spi = spi; in tpohvga_probe()
152 plat_data->plat_onoff = mi->plat_set_onoff; in tpohvga_probe()
153 panel_tpohvga.plat_data = plat_data; in tpohvga_probe()
/drivers/gpu/drm/rockchip/
Danalogix_dp-rockchip.c72 struct analogix_dp_plat_data plat_data; member
82 static struct rockchip_dp_device *pdata_encoder_to_dp(struct analogix_dp_plat_data *plat_data) in pdata_encoder_to_dp() argument
84 return container_of(plat_data, struct rockchip_dp_device, plat_data); in pdata_encoder_to_dp()
96 static int rockchip_dp_poweron_start(struct analogix_dp_plat_data *plat_data) in rockchip_dp_poweron_start() argument
98 struct rockchip_dp_device *dp = pdata_encoder_to_dp(plat_data); in rockchip_dp_poweron_start()
117 static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data) in rockchip_dp_powerdown() argument
119 struct rockchip_dp_device *dp = pdata_encoder_to_dp(plat_data); in rockchip_dp_powerdown()
126 static int rockchip_dp_get_modes(struct analogix_dp_plat_data *plat_data, in rockchip_dp_get_modes() argument
347 dp->plat_data.encoder = &dp->encoder.encoder; in rockchip_dp_bind()
396 dp->plat_data.panel = panel; in rockchip_dp_probe()
[all …]
Ddw_hdmi-rockchip.c77 const struct dw_hdmi_plat_data *plat_data; member
260 bool exact_match = hdmi->plat_data->phy_force_vendor; in dw_hdmi_rockchip_mode_valid()
553 struct dw_hdmi_plat_data *plat_data; in dw_hdmi_rockchip_bind() local
568 plat_data = devm_kmemdup(&pdev->dev, match->data, in dw_hdmi_rockchip_bind()
569 sizeof(*plat_data), GFP_KERNEL); in dw_hdmi_rockchip_bind()
570 if (!plat_data) in dw_hdmi_rockchip_bind()
574 hdmi->plat_data = plat_data; in dw_hdmi_rockchip_bind()
575 hdmi->chip_data = plat_data->phy_data; in dw_hdmi_rockchip_bind()
576 plat_data->phy_data = hdmi; in dw_hdmi_rockchip_bind()
577 plat_data->priv_data = hdmi; in dw_hdmi_rockchip_bind()
[all …]
/drivers/net/ethernet/ti/icssg/
Dicss_iep.c105 const struct icss_iep_plat_data *plat_data; member
137 if (iep && (iep->plat_data->flags & ICSS_IEP_64BIT_COUNTER_SUPPORT)) in icss_iep_get_count_hi()
138 val = readl(iep->base + iep->plat_data->reg_offs[ICSS_IEP_COUNT_REG1]); in icss_iep_get_count_hi()
155 val = readl(iep->base + iep->plat_data->reg_offs[ICSS_IEP_COUNT_REG0]); in icss_iep_get_count_low()
177 if (iep->plat_data->flags & ICSS_IEP_64BIT_COUNTER_SUPPORT) in icss_iep_set_counter()
179 iep->plat_data->reg_offs[ICSS_IEP_COUNT_REG1]); in icss_iep_set_counter()
180 writel(lower_32_bits(ns), iep->base + iep->plat_data->reg_offs[ICSS_IEP_COUNT_REG0]); in icss_iep_set_counter()
204 writel(0, iep->base + iep->plat_data->reg_offs[ICSS_IEP_SYNC_CTRL_REG]); in icss_iep_settime()
211 iep->base + iep->plat_data->reg_offs[ICSS_IEP_SYNC_CTRL_REG]); in icss_iep_settime()
240 ts_lo = readl(iep->base + iep->plat_data->reg_offs[ICSS_IEP_COUNT_REG0]); in icss_iep_gettime()
[all …]
/drivers/memory/
Demif.c65 struct emif_platform_data *plat_data; member
79 u32 type = emif->plat_data->device_info->type; in do_emif_regdump_show()
80 u32 ip_rev = emif->plat_data->ip_rev; in do_emif_regdump_show()
218 if ((emif->plat_data->ip_rev == EMIF_4D) && in set_lpmode()
380 struct emif_custom_configs *cust_cfgs = emif->plat_data->custom_configs; in get_pwr_mgmt_ctrl()
474 if (emif->plat_data->device_info->cs1_used) { in get_temperature_level()
506 type = emif->plat_data->device_info->type; in setup_temperature_sensitive_regs()
548 custom_configs = emif->plat_data->custom_configs; in handle_temp_alert()
612 if (emif->plat_data->hw_caps & EMIF_HW_CAPS_LL_INTERFACE) { in emif_interrupt_handler()
662 if (emif->plat_data->hw_caps & EMIF_HW_CAPS_LL_INTERFACE) in clear_all_interrupts()
[all …]
/drivers/gpu/drm/bridge/analogix/
Danalogix_dp_core.c945 if (dp->plat_data->panel) { in analogix_dp_commit()
946 if (drm_panel_disable(dp->plat_data->panel)) in analogix_dp_commit()
970 if (dp->plat_data->panel) { in analogix_dp_commit()
971 ret = drm_panel_enable(dp->plat_data->panel); in analogix_dp_commit()
1080 if (!dp->plat_data->panel) in analogix_dp_prepare_panel()
1093 ret = drm_panel_prepare(dp->plat_data->panel); in analogix_dp_prepare_panel()
1095 ret = drm_panel_unprepare(dp->plat_data->panel); in analogix_dp_prepare_panel()
1114 if (dp->plat_data->panel) { in analogix_dp_get_modes()
1115 num_modes += drm_panel_get_modes(dp->plat_data->panel, connector); in analogix_dp_get_modes()
1136 if (dp->plat_data->get_modes) in analogix_dp_get_modes()
[all …]
Danalogix_dp_reg.c74 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) { in analogix_dp_init_analog_param()
76 if (dp->plat_data->dev_type == RK3288_DP) in analogix_dp_init_analog_param()
125 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) in analogix_dp_reset()
237 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) { in analogix_dp_set_pll_power_down()
258 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) in analogix_dp_set_analog_power_down()
263 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) in analogix_dp_set_analog_power_down()
321 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) in analogix_dp_set_analog_power_down()
333 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) in analogix_dp_set_analog_power_down()
481 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) in analogix_dp_init_aux()
888 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) { in analogix_dp_config_video_slave_mode()
/drivers/input/joystick/
Das5011.c217 const struct as5011_platform_data *plat_data; in as5011_probe() local
223 plat_data = dev_get_platdata(&client->dev); in as5011_probe()
224 if (!plat_data) in as5011_probe()
227 if (!plat_data->axis_irq) { in as5011_probe()
251 as5011->button_gpio = plat_data->button_gpio; in as5011_probe()
252 as5011->axis_irq = plat_data->axis_irq; in as5011_probe()
292 error = as5011_configure_chip(as5011, plat_data); in as5011_probe()
298 plat_data->axis_irqflags | IRQF_ONESHOT, in as5011_probe()
302 "Can't allocate axis irq %d\n", plat_data->axis_irq); in as5011_probe()
/drivers/gpu/drm/bridge/synopsys/
Ddw-mipi-dsi.c269 const struct dw_mipi_dsi_plat_data *plat_data; member
317 const struct dw_mipi_dsi_plat_data *pdata = dsi->plat_data; in dw_mipi_dsi_host_attach()
321 if (device->lanes > dsi->plat_data->max_data_lanes) { in dw_mipi_dsi_host_attach()
354 const struct dw_mipi_dsi_plat_data *pdata = dsi->plat_data; in dw_mipi_dsi_host_detach()
601 const struct dw_mipi_dsi_phy_ops *phy_ops = dsi->plat_data->phy_ops; in dw_mipi_dsi_init()
611 ret = phy_ops->get_esc_clk_rate(dsi->plat_data->priv_data, in dw_mipi_dsi_init()
764 const struct dw_mipi_dsi_phy_ops *phy_ops = dsi->plat_data->phy_ops; in dw_mipi_dsi_dphy_timing_config()
769 ret = phy_ops->get_timing(dsi->plat_data->priv_data, in dw_mipi_dsi_dphy_timing_config()
854 const struct dw_mipi_dsi_phy_ops *phy_ops = dsi->plat_data->phy_ops; in dw_mipi_dsi_bridge_post_atomic_disable()
865 phy_ops->power_off(dsi->plat_data->priv_data); in dw_mipi_dsi_bridge_post_atomic_disable()
[all …]
Ddw-hdmi.c146 const struct dw_hdmi_plat_data *plat_data; member
783 const struct dw_hdmi_plat_data *pdata = hdmi->plat_data; in dw_hdmi_gp_audio_enable()
853 const struct dw_hdmi_plat_data *pdata = hdmi->plat_data; in dw_hdmi_gp_audio_disable()
1628 const struct dw_hdmi_plat_data *pdata = hdmi->plat_data; in hdmi_phy_configure()
1954 if (!hdmi->plat_data->use_drm_infoframe) in hdmi_config_drm_infoframe()
2272 if (hdmi->plat_data->input_bus_encoding) in dw_hdmi_setup()
2274 hdmi->plat_data->input_bus_encoding; in dw_hdmi_setup()
2570 hdmi->plat_data->ycbcr_420_allowed; in dw_hdmi_connector_create()
2592 if (hdmi->version >= 0x200a && hdmi->plat_data->use_drm_infoframe) in dw_hdmi_connector_create()
2915 const struct dw_hdmi_plat_data *pdata = hdmi->plat_data; in dw_hdmi_bridge_mode_valid()
[all …]
/drivers/gpu/drm/sun4i/
Dsun8i_dw_hdmi.c100 struct dw_hdmi_plat_data *plat_data; in sun8i_dw_hdmi_bind() local
114 plat_data = &hdmi->plat_data; in sun8i_dw_hdmi_bind()
185 plat_data->mode_valid = hdmi->quirks->mode_valid; in sun8i_dw_hdmi_bind()
186 plat_data->use_drm_infoframe = hdmi->quirks->use_drm_infoframe; in sun8i_dw_hdmi_bind()
187 sun8i_hdmi_phy_set_ops(hdmi->phy, plat_data); in sun8i_dw_hdmi_bind()
191 hdmi->hdmi = dw_hdmi_bind(pdev, encoder, plat_data); in sun8i_dw_hdmi_bind()
Dsun8i_hdmi_phy.c575 struct dw_hdmi_plat_data *plat_data) in sun8i_hdmi_phy_set_ops() argument
580 plat_data->phy_ops = variant->phy_ops; in sun8i_hdmi_phy_set_ops()
581 plat_data->phy_name = "sun8i_dw_hdmi_phy"; in sun8i_hdmi_phy_set_ops()
582 plat_data->phy_data = phy; in sun8i_hdmi_phy_set_ops()
584 plat_data->mpll_cfg = variant->mpll_cfg; in sun8i_hdmi_phy_set_ops()
585 plat_data->cur_ctr = variant->cur_ctr; in sun8i_hdmi_phy_set_ops()
586 plat_data->phy_config = variant->phy_cfg; in sun8i_hdmi_phy_set_ops()
/drivers/mmc/host/
Dsdhci-pic32.c142 struct pic32_sdhci_platform_data *plat_data; in pic32_sdhci_probe() local
155 plat_data = pdev->dev.platform_data; in pic32_sdhci_probe()
156 if (plat_data && plat_data->setup_dma) { in pic32_sdhci_probe()
157 ret = plat_data->setup_dma(ADMA_FIFO_RD_THSHLD, in pic32_sdhci_probe()
/drivers/net/wireless/st/cw1200/
Dcw1200_spi.c360 const struct cw1200_platform_data_spi *plat_data = in cw1200_spi_probe() local
372 if (plat_data->spi_bits_per_word) in cw1200_spi_probe()
373 func->bits_per_word = plat_data->spi_bits_per_word; in cw1200_spi_probe()
384 if (cw1200_spi_on(plat_data)) { in cw1200_spi_probe()
400 self->pdata = plat_data; in cw1200_spi_probe()
419 cw1200_spi_off(plat_data); in cw1200_spi_probe()
/drivers/phy/rockchip/
Dphy-rockchip-inno-hdmi.c240 const struct inno_hdmi_phy_drv_data *plat_data; member
609 const struct phy_config *phy_cfg = inno->plat_data->phy_cfg_table; in inno_hdmi_phy_power_on()
619 if (!inno->plat_data->ops->power_on) in inno_hdmi_phy_power_on()
636 inno->plat_data->clk_ops->set_rate(&inno->hw, inno->pixclock, 24000000); in inno_hdmi_phy_power_on()
642 ret = inno->plat_data->ops->power_on(inno, cfg, phy_cfg); in inno_hdmi_phy_power_on()
655 if (!inno->plat_data->ops->power_off) in inno_hdmi_phy_power_off()
658 inno->plat_data->ops->power_off(inno); in inno_hdmi_phy_power_off()
1010 init.ops = inno->plat_data->clk_ops; in inno_hdmi_phy_clk_register()
1317 inno->plat_data = of_device_get_match_data(inno->dev); in inno_hdmi_phy_probe()
1318 if (!inno->plat_data || !inno->plat_data->ops) in inno_hdmi_phy_probe()
[all …]
/drivers/gpu/drm/xen/
Dxen_drm_front_evtchnl.c276 struct xen_drm_front_cfg *plat_data; in xen_drm_front_evtchnl_publish_all() local
279 plat_data = &front_info->cfg; in xen_drm_front_evtchnl_publish_all()
289 for (conn = 0; conn < plat_data->num_connectors; conn++) { in xen_drm_front_evtchnl_publish_all()
291 plat_data->connectors[conn].xenstore_path, in xen_drm_front_evtchnl_publish_all()
298 plat_data->connectors[conn].xenstore_path, in xen_drm_front_evtchnl_publish_all()

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