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Searched refs:post_divr_freq (Results 1 – 1 of 1) sorted by relevance

/drivers/clk/analogbits/
Dwrpll-cln28hpc.c83 static int __wrpll_calc_filter_range(unsigned long post_divr_freq) in __wrpll_calc_filter_range() argument
85 if (post_divr_freq < MIN_POST_DIVR_FREQ || in __wrpll_calc_filter_range()
86 post_divr_freq > MAX_POST_DIVR_FREQ) { in __wrpll_calc_filter_range()
88 __func__, post_divr_freq); in __wrpll_calc_filter_range()
92 switch (post_divr_freq) { in __wrpll_calc_filter_range()
230 u32 best_f, f, post_divr_freq; in wrpll_configure_for_rate() local
281 post_divr_freq = div_u64(parent_rate, r); in wrpll_configure_for_rate()
282 vco_pre = fbdiv * post_divr_freq; in wrpll_configure_for_rate()
305 post_divr_freq = div_u64(parent_rate, best_r); in wrpll_configure_for_rate()
308 range = __wrpll_calc_filter_range(post_divr_freq); in wrpll_configure_for_rate()