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Searched refs:ptys_reg (Results 1 – 6 of 6) sorted by relevance

/drivers/net/ethernet/mellanox/mlx4/
Den_ethtool.c560 struct mlx4_ptys_reg *ptys_reg) in ptys2ethtool_update_supported_port() argument
562 u32 eth_proto = be32_to_cpu(ptys_reg->eth_proto_cap); in ptys2ethtool_update_supported_port()
585 static u32 ptys_get_active_port(struct mlx4_ptys_reg *ptys_reg) in ptys_get_active_port() argument
587 u32 eth_proto = be32_to_cpu(ptys_reg->eth_proto_oper); in ptys_get_active_port()
590 eth_proto = be32_to_cpu(ptys_reg->eth_proto_cap); in ptys_get_active_port()
750 struct mlx4_ptys_reg ptys_reg; in ethtool_get_ptys_link_ksettings() local
754 memset(&ptys_reg, 0, sizeof(ptys_reg)); in ethtool_get_ptys_link_ksettings()
755 ptys_reg.local_port = priv->port; in ethtool_get_ptys_link_ksettings()
756 ptys_reg.proto_mask = MLX4_PTYS_EN; in ethtool_get_ptys_link_ksettings()
758 MLX4_ACCESS_REG_QUERY, &ptys_reg); in ethtool_get_ptys_link_ksettings()
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Dfw.c2986 struct mlx4_ptys_reg *ptys_reg) in mlx4_ACCESS_PTYS_REG() argument
2989 method, sizeof(*ptys_reg), ptys_reg); in mlx4_ACCESS_PTYS_REG()
3008 struct mlx4_ptys_reg *ptys_reg = in mlx4_ACCESS_REG_wrapper() local
3011 ptys_reg->local_port = in mlx4_ACCESS_REG_wrapper()
3013 ptys_reg->local_port); in mlx4_ACCESS_REG_wrapper()
/drivers/net/ethernet/mellanox/mlx5/core/en/
Dport.c38 u32 out[MLX5_ST_SZ_DW(ptys_reg)]; in mlx5_port_query_eth_autoneg()
47 *an_status = MLX5_GET(ptys_reg, out, an_status); in mlx5_port_query_eth_autoneg()
48 *an_disable_cap = MLX5_GET(ptys_reg, out, an_disable_cap); in mlx5_port_query_eth_autoneg()
49 *an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin); in mlx5_port_query_eth_autoneg()
55 u32 out[MLX5_ST_SZ_DW(ptys_reg)]; in mlx5_port_set_eth_ptys()
56 u32 in[MLX5_ST_SZ_DW(ptys_reg)]; in mlx5_port_set_eth_ptys()
68 MLX5_SET(ptys_reg, in, local_port, 1); in mlx5_port_set_eth_ptys()
69 MLX5_SET(ptys_reg, in, an_disable_admin, an_disable); in mlx5_port_set_eth_ptys()
70 MLX5_SET(ptys_reg, in, proto_mask, MLX5_PTYS_EN); in mlx5_port_set_eth_ptys()
72 MLX5_SET(ptys_reg, in, ext_eth_proto_admin, proto_admin); in mlx5_port_set_eth_ptys()
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/drivers/net/ethernet/mellanox/mlx5/core/
Dport.c149 u32 in[MLX5_ST_SZ_DW(ptys_reg)] = {0}; in mlx5_query_port_ptys()
151 MLX5_SET(ptys_reg, in, local_port, local_port); in mlx5_query_port_ptys()
152 MLX5_SET(ptys_reg, in, proto_mask, proto_mask); in mlx5_query_port_ptys()
172 u32 out[MLX5_ST_SZ_DW(ptys_reg)]; in mlx5_query_ib_port_oper()
180 *link_width_oper = MLX5_GET(ptys_reg, out, ib_link_width_oper); in mlx5_query_ib_port_oper()
181 *proto_oper = MLX5_GET(ptys_reg, out, ib_proto_oper); in mlx5_query_ib_port_oper()
1110 u32 out[MLX5_ST_SZ_DW(ptys_reg)]; in mlx5_port_query_eth_proto()
1120 eproto->cap = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, in mlx5_port_query_eth_proto()
1122 eproto->admin = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, eth_proto_admin); in mlx5_port_query_eth_proto()
1123 eproto->oper = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, eth_proto_oper); in mlx5_port_query_eth_proto()
Den_ethtool.c997 u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {}; in mlx5e_ethtool_get_link_ksettings()
1018 ext = !!MLX5_GET_ETH_PROTO(ptys_reg, out, true, eth_proto_capability); in mlx5e_ethtool_get_link_ksettings()
1019 eth_proto_cap = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, in mlx5e_ethtool_get_link_ksettings()
1021 eth_proto_admin = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, in mlx5e_ethtool_get_link_ksettings()
1031 eth_proto_admin = MLX5_GET_ETH_PROTO(ptys_reg, out, false, in mlx5e_ethtool_get_link_ksettings()
1036 eth_proto_oper = MLX5_GET_ETH_PROTO(ptys_reg, out, admin_ext, in mlx5e_ethtool_get_link_ksettings()
1038 eth_proto_lp = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise); in mlx5e_ethtool_get_link_ksettings()
1039 an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin); in mlx5e_ethtool_get_link_ksettings()
1040 an_status = MLX5_GET(ptys_reg, out, an_status); in mlx5e_ethtool_get_link_ksettings()
1041 connector_type = MLX5_GET(ptys_reg, out, connector_type); in mlx5e_ethtool_get_link_ksettings()
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/drivers/infiniband/hw/mlx5/
Dmain.c476 u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {0}; in mlx5_query_port_roce()
509 ext = !!MLX5_GET_ETH_PROTO(ptys_reg, out, true, eth_proto_capability); in mlx5_query_port_roce()
510 eth_prot_oper = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, eth_proto_oper); in mlx5_query_port_roce()