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Searched refs:regval (Results 1 – 25 of 321) sorted by relevance

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/drivers/net/ethernet/synopsys/
Ddwc-xlgmac-hw.c38 u32 regval; in xlgmac_disable_rx_csum() local
40 regval = readl(pdata->mac_regs + MAC_RCR); in xlgmac_disable_rx_csum()
41 regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_IPC_POS, in xlgmac_disable_rx_csum()
43 writel(regval, pdata->mac_regs + MAC_RCR); in xlgmac_disable_rx_csum()
50 u32 regval; in xlgmac_enable_rx_csum() local
52 regval = readl(pdata->mac_regs + MAC_RCR); in xlgmac_enable_rx_csum()
53 regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_IPC_POS, in xlgmac_enable_rx_csum()
55 writel(regval, pdata->mac_regs + MAC_RCR); in xlgmac_enable_rx_csum()
112 u32 regval; in xlgmac_enable_rx_vlan_stripping() local
114 regval = readl(pdata->mac_regs + MAC_VLANTR); in xlgmac_enable_rx_vlan_stripping()
[all …]
/drivers/bus/mhi/ep/
Dmmio.c25 u32 regval; in mhi_ep_mmio_masked_write() local
27 regval = mhi_ep_mmio_read(mhi_cntrl, offset); in mhi_ep_mmio_masked_write()
28 regval &= ~mask; in mhi_ep_mmio_masked_write()
29 regval |= (val << __ffs(mask)) & mask; in mhi_ep_mmio_masked_write()
30 mhi_ep_mmio_write(mhi_cntrl, offset, regval); in mhi_ep_mmio_masked_write()
35 u32 regval; in mhi_ep_mmio_masked_read() local
37 regval = mhi_ep_mmio_read(dev, offset); in mhi_ep_mmio_masked_read()
38 regval &= mask; in mhi_ep_mmio_masked_read()
39 regval >>= __ffs(mask); in mhi_ep_mmio_masked_read()
41 return regval; in mhi_ep_mmio_masked_read()
[all …]
/drivers/media/pci/cx23885/
Dcx23885-417.c275 u32 regval; in cx23885_mc417_init() local
280 regval = MC417_SPD_CTL(MC417_SPD_CTL_FAST) | in cx23885_mc417_init()
283 cx_write(MC417_CTL, regval); in cx23885_mc417_init()
286 regval = MC417_MIRDY; in cx23885_mc417_init()
287 cx_write(MC417_OEN, regval); in cx23885_mc417_init()
290 regval = MC417_MIWR | MC417_MIRD | MC417_MICS; in cx23885_mc417_init()
291 cx_write(MC417_RWD, regval); in cx23885_mc417_init()
311 u32 regval; in mc417_register_write() local
319 regval = MC417_MIRD | MC417_MIRDY | MCI_REGISTER_DATA_BYTE0 | in mc417_register_write()
321 cx_write(MC417_RWD, regval); in mc417_register_write()
[all …]
/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_opp_csc_v.c132 tbl_entry->regval[0], in program_color_matrix_v()
138 tbl_entry->regval[1], in program_color_matrix_v()
150 tbl_entry->regval[2], in program_color_matrix_v()
156 tbl_entry->regval[3], in program_color_matrix_v()
168 tbl_entry->regval[4], in program_color_matrix_v()
174 tbl_entry->regval[5], in program_color_matrix_v()
186 tbl_entry->regval[6], in program_color_matrix_v()
192 tbl_entry->regval[7], in program_color_matrix_v()
204 tbl_entry->regval[8], in program_color_matrix_v()
210 tbl_entry->regval[9], in program_color_matrix_v()
[all …]
/drivers/power/supply/
Dltc4162-l-charger.c131 unsigned int regval; in ltc4162l_get_status() local
134 ret = regmap_read(info->regmap, LTC4162L_CHARGER_STATE, &regval); in ltc4162l_get_status()
140 val->intval = ltc4162l_state_decode(regval); in ltc4162l_get_status()
161 unsigned int regval; in ltc4162l_get_charge_type() local
164 ret = regmap_read(info->regmap, LTC4162L_CHARGE_STATUS, &regval); in ltc4162l_get_charge_type()
168 val->intval = ltc4162l_charge_status_decode(regval); in ltc4162l_get_charge_type()
194 unsigned int regval; in ltc4162l_get_health() local
197 ret = regmap_read(info->regmap, LTC4162L_CHARGER_STATE, &regval); in ltc4162l_get_health()
201 val->intval = ltc4162l_state_to_health(regval); in ltc4162l_get_health()
209 unsigned int regval; in ltc4162l_get_online() local
[all …]
Dadp5061.c178 unsigned int regval; in adp5061_get_input_current_limit() local
181 ret = regmap_read(st->regmap, ADP5061_VINX_SET, &regval); in adp5061_get_input_current_limit()
185 mode = ADP5061_VINX_SET_ILIM_MODE(regval); in adp5061_get_input_current_limit()
228 unsigned int regval; in adp5061_get_min_voltage() local
231 ret = regmap_read(st->regmap, ADP5061_VOLTAGE_TH, &regval); in adp5061_get_min_voltage()
235 regval = ((regval & ADP5061_VOLTAGE_TH_VTRK_DEAD_MSK) >> 3); in adp5061_get_min_voltage()
236 val->intval = adp5061_vmin[regval] * 1000; in adp5061_get_min_voltage()
244 unsigned int regval; in adp5061_get_chg_volt_lim() local
247 ret = regmap_read(st->regmap, ADP5061_TERM_SET, &regval); in adp5061_get_chg_volt_lim()
251 mode = ADP5061_TERM_SET_CHG_VLIM_MODE(regval); in adp5061_get_chg_volt_lim()
[all …]
/drivers/hwmon/
Dina238.c134 int regval; in ina238_read_in() local
188 err = regmap_read(data->regmap, reg, &regval); in ina238_read_in()
197 regval = (s16)regval; in ina238_read_in()
200 *val = (regval * INA238_SHUNT_VOLTAGE_LSB) / in ina238_read_in()
203 *val = (regval * INA238_BUS_VOLTAGE_LSB) / 1000; in ina238_read_in()
207 *val = !!(regval & mask); in ina238_read_in()
218 int regval; in ina238_write_in() local
227 regval = clamp_val(val, -163, 163); in ina238_write_in()
228 regval = (regval * 1000 * (4 - data->gain + 1)) / in ina238_write_in()
230 regval = clamp_val(regval, S16_MIN, S16_MAX); in ina238_write_in()
[all …]
Dtmp401.c147 int regval; in tmp401_reg_read() local
166 regval = i2c_smbus_read_word_swapped(client, reg); in tmp401_reg_read()
167 if (regval < 0) in tmp401_reg_read()
168 return regval; in tmp401_reg_read()
169 *val = regval; in tmp401_reg_read()
174 regval = i2c_smbus_read_byte_data(client, reg); in tmp401_reg_read()
175 if (regval < 0) in tmp401_reg_read()
176 return regval; in tmp401_reg_read()
177 *val = regval << 8; in tmp401_reg_read()
182 regval = i2c_smbus_read_byte_data(client, reg); in tmp401_reg_read()
[all …]
Dmax31730.c84 u8 regval = *confdata; in max31730_set_enable() local
88 regval |= BIT(channel); in max31730_set_enable()
90 regval &= ~BIT(channel); in max31730_set_enable()
92 if (regval != *confdata) { in max31730_set_enable()
93 err = i2c_smbus_write_byte_data(client, reg, regval); in max31730_set_enable()
96 *confdata = regval; in max31730_set_enable()
119 int regval, reg, offset; in max31730_read() local
153 regval = i2c_smbus_read_byte_data(data->client, in max31730_read()
155 if (regval < 0) in max31730_read()
156 return regval; in max31730_read()
[all …]
Dmax6621.c167 static int max6621_verify_reg_data(struct device *dev, int regval) in max6621_verify_reg_data() argument
169 if (regval >= MAX6621_PECI_ERR_MIN && in max6621_verify_reg_data()
170 regval <= MAX6621_PECI_ERR_MAX) { in max6621_verify_reg_data()
172 regval); in max6621_verify_reg_data()
177 switch (regval) { in max6621_verify_reg_data()
180 regval); in max6621_verify_reg_data()
183 dev_dbg(dev, "Polling disabled - err 0x%04x.\n", regval); in max6621_verify_reg_data()
187 regval); in max6621_verify_reg_data()
190 dev_dbg(dev, "Resource is disabled - err 0x%04x.\n", regval); in max6621_verify_reg_data()
193 dev_dbg(dev, "No alert active - err 0x%04x.\n", regval); in max6621_verify_reg_data()
[all …]
Dmax31760.c81 unsigned int regval; in max31760_read() local
91 ret = regmap_read(state->regmap, REG_STATUS, &regval); in max31760_read()
95 *val = FIELD_GET(STATUS_RDFA, regval); in max31760_read()
99 ret = regmap_read(state->regmap, REG_STATUS, &regval); in max31760_read()
104 *val = FIELD_GET(STATUS_ALARM_MAX(1), regval); in max31760_read()
106 *val = FIELD_GET(STATUS_ALARM_MAX(0), regval); in max31760_read()
110 ret = regmap_read(state->regmap, REG_STATUS, &regval); in max31760_read()
115 *val = FIELD_GET(STATUS_ALARM_CRIT(1), regval); in max31760_read()
117 *val = FIELD_GET(STATUS_ALARM_CRIT(0), regval); in max31760_read()
153 ret = regmap_read(state->regmap, REG_STATUS, &regval); in max31760_read()
[all …]
Dk10temp.c89 void (*read_htcreg)(struct pci_dev *pdev, u32 *regval);
90 void (*read_tempreg)(struct pci_dev *pdev, u32 *regval);
121 static void read_htcreg_pci(struct pci_dev *pdev, u32 *regval) in read_htcreg_pci() argument
123 pci_read_config_dword(pdev, REG_HARDWARE_THERMAL_CONTROL, regval); in read_htcreg_pci()
126 static void read_tempreg_pci(struct pci_dev *pdev, u32 *regval) in read_tempreg_pci() argument
128 pci_read_config_dword(pdev, REG_REPORTED_TEMPERATURE, regval); in read_tempreg_pci()
142 static void read_htcreg_nb_f15(struct pci_dev *pdev, u32 *regval) in read_htcreg_nb_f15() argument
145 F15H_M60H_HARDWARE_TEMP_CTRL_OFFSET, regval); in read_htcreg_nb_f15()
148 static void read_tempreg_nb_f15(struct pci_dev *pdev, u32 *regval) in read_tempreg_nb_f15() argument
151 F15H_M60H_REPORTED_TEMP_CTRL_OFFSET, regval); in read_tempreg_nb_f15()
[all …]
Dadm9240.c218 unsigned int regval; in cpu0_vid_show() local
222 err = regmap_read(data->regmap, ADM9240_REG_VID_FAN_DIV, &regval); in cpu0_vid_show()
225 vid = regval & 0x0f; in cpu0_vid_show()
226 err = regmap_read(data->regmap, ADM9240_REG_VID4, &regval); in cpu0_vid_show()
229 vid |= (regval & 1) << 4; in cpu0_vid_show()
238 unsigned int regval; in aout_output_show() local
241 err = regmap_read(data->regmap, ADM9240_REG_ANALOG_OUT, &regval); in aout_output_show()
245 return sprintf(buf, "%d\n", AOUT_FROM_REG(regval)); in aout_output_show()
315 unsigned int regval; in adm9240_init_client() local
373 err = regmap_read(data->regmap, ADM9240_REG_VID_FAN_DIV, &regval); in adm9240_init_client()
[all …]
Dlm83.c179 unsigned int regval; in lm83_temp_read() local
184 err = regmap_read(data->regmap, LM83_REG_TEMP[channel], &regval); in lm83_temp_read()
187 *val = (s8)regval * 1000; in lm83_temp_read()
190 err = regmap_read(data->regmap, LM83_REG_MAX[channel], &regval); in lm83_temp_read()
193 *val = (s8)regval * 1000; in lm83_temp_read()
196 err = regmap_read(data->regmap, LM83_REG_R_TCRIT, &regval); in lm83_temp_read()
199 *val = (s8)regval * 1000; in lm83_temp_read()
202 err = regmap_read(data->regmap, LM83_ALARM_REG[channel], &regval); in lm83_temp_read()
205 *val = !!(regval & LM83_MAX_ALARM_BIT[channel]); in lm83_temp_read()
208 err = regmap_read(data->regmap, LM83_ALARM_REG[channel], &regval); in lm83_temp_read()
[all …]
Dmlxreg-fan.c126 u32 regval; in mlxreg_fan_read() local
139 err = regmap_read(fan->regmap, tacho->prsnt, &regval); in mlxreg_fan_read()
147 if (BIT(channel / fan->tachos_per_drwr) & regval) { in mlxreg_fan_read()
154 err = regmap_read(fan->regmap, tacho->reg, &regval); in mlxreg_fan_read()
158 if (MLXREG_FAN_GET_FAULT(regval, tacho->mask)) { in mlxreg_fan_read()
164 *val = MLXREG_FAN_GET_RPM(regval, fan->divider, in mlxreg_fan_read()
169 err = regmap_read(fan->regmap, tacho->reg, &regval); in mlxreg_fan_read()
173 *val = MLXREG_FAN_GET_FAULT(regval, tacho->mask); in mlxreg_fan_read()
185 err = regmap_read(fan->regmap, pwm->reg, &regval); in mlxreg_fan_read()
189 *val = regval; in mlxreg_fan_read()
[all …]
/drivers/i2c/busses/
Di2c-mchp-pci1xxxx.c373 u8 regval; in pci1xxxx_i2c_configure_smbalert_pin() local
375 regval = readb(p); in pci1xxxx_i2c_configure_smbalert_pin()
378 regval |= SMBALERT_MST_PU; in pci1xxxx_i2c_configure_smbalert_pin()
380 regval &= ~SMBALERT_MST_PU; in pci1xxxx_i2c_configure_smbalert_pin()
382 writeb(regval, p); in pci1xxxx_i2c_configure_smbalert_pin()
388 u8 regval; in pci1xxxx_i2c_send_start_stop() local
390 regval = readb(p); in pci1xxxx_i2c_send_start_stop()
393 regval |= SMB_CORE_CMD_START; in pci1xxxx_i2c_send_start_stop()
395 regval |= SMB_CORE_CMD_STOP; in pci1xxxx_i2c_send_start_stop()
397 writeb(regval, p); in pci1xxxx_i2c_send_start_stop()
[all …]
/drivers/spi/
Dspi-pci1xxxx.c113 u32 regval; in pci1xxxx_spi_set_cs() local
116 regval = readl(par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst)); in pci1xxxx_spi_set_cs()
118 regval |= SPI_FORCE_CE; in pci1xxxx_spi_set_cs()
119 regval &= ~SPI_MST_CTL_DEVSEL_MASK; in pci1xxxx_spi_set_cs()
120 regval |= (spi_get_chipselect(spi, 0) << 25); in pci1xxxx_spi_set_cs()
122 regval &= ~SPI_FORCE_CE; in pci1xxxx_spi_set_cs()
124 writel(regval, par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst)); in pci1xxxx_spi_set_cs()
160 u32 regval; in pci1xxxx_spi_transfer_one() local
169 regval = readl(par->reg_base + SPI_MST_EVENT_REG_OFFSET(p->hw_inst)); in pci1xxxx_spi_transfer_one()
170 writel(regval, par->reg_base + SPI_MST_EVENT_REG_OFFSET(p->hw_inst)); in pci1xxxx_spi_transfer_one()
[all …]
/drivers/crypto/hisilicon/sec/
Dsec_drv.c255 u32 regval; in sec_queue_ar_pkgattr() local
257 regval = readl_relaxed(addr); in sec_queue_ar_pkgattr()
259 regval |= SEC_Q_ARUSER_CFG_PKG; in sec_queue_ar_pkgattr()
261 regval &= ~SEC_Q_ARUSER_CFG_PKG; in sec_queue_ar_pkgattr()
262 writel_relaxed(regval, addr); in sec_queue_ar_pkgattr()
270 u32 regval; in sec_queue_aw_pkgattr() local
272 regval = readl_relaxed(addr); in sec_queue_aw_pkgattr()
273 regval |= SEC_Q_AWUSER_CFG_PKG; in sec_queue_aw_pkgattr()
274 writel_relaxed(regval, addr); in sec_queue_aw_pkgattr()
361 u32 regval; in sec_bd_endian_little() local
[all …]
/drivers/iio/proximity/
Dsx9324.c390 unsigned int reg, regval; in sx9324_read_gain() local
394 ret = regmap_read(data->regmap, reg, &regval); in sx9324_read_gain()
398 regval = FIELD_GET(SX9324_REG_PROX_CTRL0_GAIN_MASK, regval); in sx9324_read_gain()
399 if (regval) in sx9324_read_gain()
400 regval--; in sx9324_read_gain()
401 else if (regval == SX9324_REG_PROX_CTRL0_GAIN_RSVD || in sx9324_read_gain()
402 regval > SX9324_REG_PROX_CTRL0_GAIN_8) in sx9324_read_gain()
405 *val = 1 << regval; in sx9324_read_gain()
414 unsigned int regval; in sx9324_read_samp_freq() local
416 ret = regmap_read(data->regmap, SX9324_REG_GNRL_CTRL0, &regval); in sx9324_read_samp_freq()
[all …]
Dsx9310.c289 unsigned int regval, gain; in sx9310_read_gain() local
292 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL3, &regval); in sx9310_read_gain()
299 gain = FIELD_GET(SX9310_REG_PROX_CTRL3_GAIN0_MASK, regval); in sx9310_read_gain()
303 gain = FIELD_GET(SX9310_REG_PROX_CTRL3_GAIN12_MASK, regval); in sx9310_read_gain()
316 unsigned int regval; in sx9310_read_samp_freq() local
319 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &regval); in sx9310_read_samp_freq()
323 regval = FIELD_GET(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, regval); in sx9310_read_samp_freq()
324 *val = sx9310_samp_freq_table[regval].val; in sx9310_read_samp_freq()
325 *val2 = sx9310_samp_freq_table[regval].val2; in sx9310_read_samp_freq()
413 unsigned int regval; in sx9310_read_thresh() local
[all …]
Dsx9360.c285 unsigned int reg, regval; in sx9360_read_gain() local
289 ret = regmap_read(data->regmap, reg, &regval); in sx9360_read_gain()
293 *val = 1 << FIELD_GET(SX9360_REG_PROX_CTRL0_GAIN_MASK, regval); in sx9360_read_gain()
407 unsigned int regval; in sx9360_read_thresh() local
410 ret = regmap_read(data->regmap, SX9360_REG_PROX_CTRL5, &regval); in sx9360_read_thresh()
414 if (regval <= 1) in sx9360_read_thresh()
415 *val = regval; in sx9360_read_thresh()
417 *val = (regval * regval) / 2; in sx9360_read_thresh()
424 unsigned int regval, pthresh; in sx9360_read_hysteresis() local
431 ret = regmap_read(data->regmap, SX9360_REG_PROX_CTRL4, &regval); in sx9360_read_hysteresis()
[all …]
/drivers/rapidio/switches/
Didt_gen2.c199 u32 regval; in idtg2_get_domain() local
205 IDT_RIO_DOMAIN, &regval); in idtg2_get_domain()
207 *sw_domain = (u8)(regval & 0xff); in idtg2_get_domain()
215 u32 regval; in idtg2_em_init() local
240 rio_read_config_32(rdev, IDT_DEV_CTRL_1, &regval); in idtg2_em_init()
242 regval | IDT_DEV_CTRL_1_GENPW | IDT_DEV_CTRL_1_PRSTBEH); in idtg2_em_init()
258 rio_read_config_32(rdev, IDT_PORT_OPS(i), &regval); in idtg2_em_init()
260 IDT_PORT_OPS(i), regval | IDT_PORT_OPS_GENPW | in idtg2_em_init()
280 rio_read_config_32(rdev, IDT_LANE_CTRL(i), &regval); in idtg2_em_init()
282 regval | IDT_LANE_CTRL_GENPW); in idtg2_em_init()
[all …]
/drivers/phy/marvell/
Dphy-berlin-sata.c69 u32 regval; in phy_berlin_sata_reg_setbits() local
75 regval = readl(ctrl_reg + PORT_VSR_DATA); in phy_berlin_sata_reg_setbits()
76 regval &= ~mask; in phy_berlin_sata_reg_setbits()
77 regval |= val; in phy_berlin_sata_reg_setbits()
78 writel(regval, ctrl_reg + PORT_VSR_DATA); in phy_berlin_sata_reg_setbits()
86 u32 regval; in phy_berlin_sata_power_on() local
94 regval = readl(priv->base + HOST_VSA_DATA); in phy_berlin_sata_power_on()
95 regval &= ~desc->power_bit; in phy_berlin_sata_power_on()
96 writel(regval, priv->base + HOST_VSA_DATA); in phy_berlin_sata_power_on()
100 regval = readl(priv->base + HOST_VSA_DATA); in phy_berlin_sata_power_on()
[all …]
/drivers/regulator/
Dab8500-ext.c115 u8 regval; in ab8500_ext_regulator_enable() local
127 regval = info->update_val_hp; in ab8500_ext_regulator_enable()
129 regval = info->update_val; in ab8500_ext_regulator_enable()
133 info->update_mask, regval); in ab8500_ext_regulator_enable()
143 info->update_mask, regval); in ab8500_ext_regulator_enable()
152 u8 regval; in ab8500_ext_regulator_disable() local
163 regval = info->update_val_hw; in ab8500_ext_regulator_disable()
165 regval = 0; in ab8500_ext_regulator_disable()
169 info->update_mask, regval); in ab8500_ext_regulator_disable()
179 info->update_mask, regval); in ab8500_ext_regulator_disable()
[all …]
/drivers/leds/
Dleds-mlxreg.c65 u32 regval; in mlxreg_led_store_hw() local
81 ret = regmap_read(led_pdata->regmap, data->reg, &regval); in mlxreg_led_store_hw()
87 regval = (regval & data->mask) | nib; in mlxreg_led_store_hw()
89 ret = regmap_write(led_pdata->regmap, data->reg, regval); in mlxreg_led_store_hw()
103 u32 regval; in mlxreg_led_get_hw() local
116 err = regmap_read(led_pdata->regmap, data->reg, &regval); in mlxreg_led_get_hw()
124 regval = regval & ~data->mask; in mlxreg_led_get_hw()
125 regval = (ror32(data->mask, data->bit) == 0xf0) ? ror32(regval, in mlxreg_led_get_hw()
126 data->bit) : ror32(regval, data->bit + 4); in mlxreg_led_get_hw()
127 if (regval >= led_data->base_color && in mlxreg_led_get_hw()
[all …]

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