| /drivers/gpu/drm/amd/display/dc/link/protocols/ |
| D | link_dp_dpia_bw.c | 252 static void set_usb4_req_bw_req(struct dc_link *link, int req_bw) in set_usb4_req_bw_req() argument
258 if (req_bw > link->dpia_bw_alloc_config.estimated_bw) { in set_usb4_req_bw_req()
261 req_bw = link->dpia_bw_alloc_config.estimated_bw; in set_usb4_req_bw_req()
264 temp = req_bw * link->dpia_bw_alloc_config.bw_granularity; in set_usb4_req_bw_req()
272 req_bw = requested_bw * (Kbps_TO_Gbps / link->dpia_bw_alloc_config.bw_granularity); in set_usb4_req_bw_req()
273 if (req_bw && (req_bw == link->dpia_bw_alloc_config.allocated_bw)) { in set_usb4_req_bw_req()
467 bool link_dp_dpia_allocate_usb4_bandwidth_for_stream(struct dc_link *link, int req_bw) in link_dp_dpia_allocate_usb4_bandwidth_for_stream() argument
474 link->dpia_bw_alloc_config.allocated_bw, req_bw); in link_dp_dpia_allocate_usb4_bandwidth_for_stream()
479 set_usb4_req_bw_req(link, req_bw); in link_dp_dpia_allocate_usb4_bandwidth_for_stream()
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| D | link_dp_capability.h | 78 struct dc_link_settings *link_setting, uint32_t req_bw);
82 uint32_t req_bw,
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| D | link_dp_capability.c | 657 …cide_dp_link_settings(struct dc_link *link, struct dc_link_settings *link_setting, uint32_t req_bw) in decide_dp_link_settings() argument
665 if (req_bw > dp_link_bandwidth_kbps(link, &link->verified_link_cap)) in decide_dp_link_settings()
677 if (req_bw <= link_bw) { in decide_dp_link_settings()
700 struct dc_link_settings *link_setting, uint32_t req_bw) in edp_decide_link_settings() argument
732 if (req_bw <= link_bw) { in edp_decide_link_settings()
758 uint32_t req_bw, in decide_edp_link_settings_with_dsc() argument
783 if (req_bw > dp_link_bandwidth_kbps(link, &link->verified_link_cap)) in decide_edp_link_settings_with_dsc()
795 if (req_bw <= link_bw) { in decide_edp_link_settings_with_dsc()
852 if (req_bw <= link_bw) { in decide_edp_link_settings_with_dsc()
907 …uint32_t req_bw = dc_bandwidth_in_kbps_from_timing(&stream->timing, dc_link_get_highest_encoding_f… in link_decide_link_settings() local
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| D | link_dp_dpia_bw.h | 64 bool link_dp_dpia_allocate_usb4_bandwidth_for_stream(struct dc_link *link, int req_bw);
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| D | link_edp_panel_control.c | 318 uint32_t req_bw; in edp_is_ilr_optimization_required() local
344 req_bw = dc_bandwidth_in_kbps_from_timing(crtc_timing, dc_link_get_highest_encoding_format(link)); in edp_is_ilr_optimization_required()
347 edp_decide_link_settings(link, &link_setting, req_bw); in edp_is_ilr_optimization_required()
349 decide_edp_link_settings_with_dsc(link, &link_setting, req_bw, LINK_RATE_UNKNOWN); in edp_is_ilr_optimization_required()
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| D | link_dp_training.c | 1703 uint32_t req_bw; in perform_link_training_with_retries() local
1718 req_bw = dc_bandwidth_in_kbps_from_timing(&stream->timing, link_encoding); in perform_link_training_with_retries()
1720 is_link_bw_low = (req_bw > link_bw); in perform_link_training_with_retries()
1727 __func__, link->link_index, req_bw, link_bw); in perform_link_training_with_retries()
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| /drivers/gpu/drm/amd/display/dc/link/ |
| D | link_validation.c | 264 uint32_t req_bw; in dp_validate_mode_timing() local
289 req_bw = dc_bandwidth_in_kbps_from_timing(timing, dc_link_get_highest_encoding_format(link)); in dp_validate_mode_timing()
292 if (req_bw <= max_bw) { in dp_validate_mode_timing()
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| /drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_link_exports.c | 294 struct dc_link_settings *link_setting, uint32_t req_bw) in dc_link_decide_edp_link_settings() argument
296 return link->dc->link_srv->edp_decide_link_settings(link, link_setting, req_bw); in dc_link_decide_edp_link_settings()
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| /drivers/gpu/drm/amd/display/dc/inc/ |
| D | link.h | 209 struct dc_link_settings *link_setting, uint32_t req_bw);
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| /drivers/media/tuners/ |
| D | mxl5005s.c | 3996 u32 req_mode, req_bw = 0; in mxl5005s_set_params() local
4004 req_bw = MXL5005S_BANDWIDTH_6MHZ; in mxl5005s_set_params()
4008 req_bw = MXL5005S_BANDWIDTH_6MHZ; in mxl5005s_set_params()
4014 req_bw = MXL5005S_BANDWIDTH_6MHZ; in mxl5005s_set_params()
4017 req_bw = MXL5005S_BANDWIDTH_7MHZ; in mxl5005s_set_params()
4021 req_bw = MXL5005S_BANDWIDTH_8MHZ; in mxl5005s_set_params()
4030 req_bw != state->Chan_Bandwidth) { in mxl5005s_set_params()
4032 ret = mxl5005s_reconfigure(fe, req_mode, req_bw); in mxl5005s_set_params()
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| /drivers/gpu/drm/bridge/cadence/ |
| D | cdns-mhdp8546-core.c | 1595 u32 max_bw, req_bw, bpp; in cdns_mhdp_bandwidth_ok() local
1605 req_bw = mode->clock * bpp / 8; in cdns_mhdp_bandwidth_ok()
1607 if (req_bw > max_bw) { in cdns_mhdp_bandwidth_ok()
1610 mode->name, req_bw, max_bw); in cdns_mhdp_bandwidth_ok()
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| /drivers/gpu/drm/amd/display/dc/ |
| D | dc.h | 1855 uint32_t req_bw);
2085 void dc_link_set_usb4_req_bw_req(struct dc_link *link, int req_bw);
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