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/drivers/clk/microchip/
Dclk-core.c295 u32 rodiv, u32 rotrim) in roclk_calc_rate() argument
305 rodiv = (rodiv << 9) + rotrim; in roclk_calc_rate()
308 do_div(rate64, rodiv); in roclk_calc_rate()
309 } else if (rodiv) { in roclk_calc_rate()
310 rate64 = parent_rate / (rodiv << 1); in roclk_calc_rate()
321 u32 div, rotrim, rodiv; in roclk_calc_div_trim() local
338 rodiv = 0; in roclk_calc_div_trim()
347 rodiv = (div > REFO_DIV_MASK) ? REFO_DIV_MASK : div; in roclk_calc_div_trim()
352 *rodiv_p = rodiv; in roclk_calc_div_trim()
362 u32 v, rodiv, rotrim; in roclk_recalc_rate() local
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