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Searched refs:soc_data (Results 1 – 25 of 42) sorted by relevance

12

/drivers/devfreq/
Dmtk-cci-devfreq.c35 const struct mtk_ccifreq_platform_data *soc_data; member
41 const struct mtk_ccifreq_platform_data *soc_data = drv->soc_data; in mtk_ccifreq_set_voltage() local
48 drv->soc_data->proc_max_volt); in mtk_ccifreq_set_voltage()
64 new_vsram = clamp(new_voltage + soc_data->min_volt_shift, in mtk_ccifreq_set_voltage()
65 soc_data->sram_min_volt, soc_data->sram_max_volt); in mtk_ccifreq_set_voltage()
69 vsram = clamp(pre_voltage + soc_data->max_volt_shift, in mtk_ccifreq_set_voltage()
70 soc_data->sram_min_volt, new_vsram); in mtk_ccifreq_set_voltage()
72 soc_data->sram_max_volt); in mtk_ccifreq_set_voltage()
76 if (vsram == soc_data->sram_max_volt || in mtk_ccifreq_set_voltage()
77 new_vsram == soc_data->sram_min_volt) in mtk_ccifreq_set_voltage()
[all …]
/drivers/phy/ti/
Dphy-gmii-sel.c60 const struct phy_gmii_sel_soc_data *soc_data; member
73 const struct phy_gmii_sel_soc_data *soc_data = if_phy->priv->soc_data; in phy_gmii_sel_mode() local
104 if (!(soc_data->extra_modes & BIT(PHY_INTERFACE_MODE_QSGMII))) in phy_gmii_sel_mode()
113 if (!(soc_data->extra_modes & BIT(PHY_INTERFACE_MODE_SGMII))) in phy_gmii_sel_mode()
120 if (!(soc_data->extra_modes & BIT(PHY_INTERFACE_MODE_USXGMII))) in phy_gmii_sel_mode()
143 if (soc_data->features & BIT(PHY_GMII_SEL_RGMII_ID_MODE) && in phy_gmii_sel_mode()
151 if (soc_data->features & BIT(PHY_GMII_SEL_RMII_IO_CLK_EN) && in phy_gmii_sel_mode()
309 if (priv->soc_data->features & BIT(PHY_GMII_SEL_RMII_IO_CLK_EN) && in phy_gmii_sel_of_xlate()
318 if (priv->soc_data->features & BIT(PHY_GMII_SEL_RMII_IO_CLK_EN)) in phy_gmii_sel_of_xlate()
329 const struct phy_gmii_sel_soc_data *soc_data = priv->soc_data; in phy_gmii_init_phy() local
[all …]
/drivers/cpufreq/
Dmediatek-cpufreq.c57 const struct mtk_cpufreq_platform_data *soc_data; member
81 const struct mtk_cpufreq_platform_data *soc_data = info->soc_data; in mtk_cpufreq_voltage_tracking() local
100 new_vsram = clamp(new_vproc + soc_data->min_volt_shift, in mtk_cpufreq_voltage_tracking()
101 soc_data->sram_min_volt, soc_data->sram_max_volt); in mtk_cpufreq_voltage_tracking()
105 vsram = clamp(pre_vproc + soc_data->max_volt_shift, in mtk_cpufreq_voltage_tracking()
106 soc_data->sram_min_volt, new_vsram); in mtk_cpufreq_voltage_tracking()
108 soc_data->sram_max_volt); in mtk_cpufreq_voltage_tracking()
113 if (vsram == soc_data->sram_max_volt || in mtk_cpufreq_voltage_tracking()
114 new_vsram == soc_data->sram_min_volt) in mtk_cpufreq_voltage_tracking()
117 vproc = vsram - soc_data->min_volt_shift; in mtk_cpufreq_voltage_tracking()
[all …]
Dqcom-cpufreq-hw.c65 const struct qcom_cpufreq_soc_data *soc_data; member
116 const struct qcom_cpufreq_soc_data *soc_data = qcom_cpufreq.soc_data; in qcom_cpufreq_hw_target_index() local
120 writel_relaxed(index, data->base + soc_data->reg_perf_state); in qcom_cpufreq_hw_target_index()
124 writel_relaxed(index, data->base + soc_data->reg_perf_state + i * 4); in qcom_cpufreq_hw_target_index()
136 if (qcom_cpufreq.soc_data->reg_current_vote) in qcom_lmh_get_throttle_freq()
137 lval = readl_relaxed(data->base + qcom_cpufreq.soc_data->reg_current_vote) & 0x3ff; in qcom_lmh_get_throttle_freq()
139 lval = readl_relaxed(data->base + qcom_cpufreq.soc_data->reg_domain_state) & 0xff; in qcom_lmh_get_throttle_freq()
148 const struct qcom_cpufreq_soc_data *soc_data; in qcom_cpufreq_get_freq() local
157 soc_data = qcom_cpufreq.soc_data; in qcom_cpufreq_get_freq()
159 index = readl_relaxed(data->base + soc_data->reg_perf_state); in qcom_cpufreq_get_freq()
[all …]
Dti-cpufreq.c70 const struct ti_cpufreq_soc_data *soc_data; member
77 efuse = opp_data->soc_data->efuse_fallback; in amx3_efuse_xlate()
251 ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset, in ti_cpufreq_get_efuse()
256 opp_data->soc_data->efuse_offset, 4); in ti_cpufreq_get_efuse()
270 efuse = (efuse & opp_data->soc_data->efuse_mask); in ti_cpufreq_get_efuse()
271 efuse >>= opp_data->soc_data->efuse_shift; in ti_cpufreq_get_efuse()
273 *efuse_value = opp_data->soc_data->efuse_xlate(opp_data, efuse); in ti_cpufreq_get_efuse()
292 ret = regmap_read(opp_data->syscon, opp_data->soc_data->rev_offset, in ti_cpufreq_get_rev()
297 opp_data->soc_data->rev_offset, 4); in ti_cpufreq_get_rev()
379 opp_data->soc_data = match->data; in ti_cpufreq_probe()
[all …]
/drivers/net/ethernet/arc/
Demac_rockchip.c30 const struct emac_rockchip_soc_data *soc_data; member
39 u32 speed_offset = emac->soc_data->grf_speed_offset; in emac_rockchip_set_mac_speed()
55 err = regmap_write(emac->grf, emac->soc_data->grf_offset, data); in emac_rockchip_set_mac_speed()
137 priv->soc_data = match->data; in emac_rockchip_probe()
181 data = (1 << (priv->soc_data->grf_speed_offset + 16)) | in emac_rockchip_probe()
182 (1 << priv->soc_data->grf_speed_offset); in emac_rockchip_probe()
184 data |= (1 << (priv->soc_data->grf_mode_offset + 16)) | in emac_rockchip_probe()
185 (0 << priv->soc_data->grf_mode_offset); in emac_rockchip_probe()
187 err = regmap_write(priv->grf, priv->soc_data->grf_offset, data); in emac_rockchip_probe()
202 if (priv->soc_data->need_div_macclk) { in emac_rockchip_probe()
[all …]
/drivers/nvmem/
Dqfprom.c80 const struct qfprom_soc_data *soc_data; member
188 int qfprom_blow_uV = priv->soc_data->qfprom_blow_uV; in qfprom_enable_fuse_blowing()
197 ret = clk_set_rate(priv->secclk, priv->soc_data->qfprom_blow_set_freq); in qfprom_enable_fuse_blowing()
229 writel(priv->soc_data->qfprom_blow_timer_value, in qfprom_enable_fuse_blowing()
231 writel(priv->soc_data->accel_value, in qfprom_enable_fuse_blowing()
369 const struct qfprom_soc_compatible_data *soc_data; in qfprom_probe() local
387 soc_data = device_get_match_data(dev); in qfprom_probe()
388 if (soc_data) { in qfprom_probe()
389 econfig.keepout = soc_data->keepout; in qfprom_probe()
390 econfig.nkeepout = soc_data->nkeepout; in qfprom_probe()
[all …]
/drivers/mmc/host/
Dsdhci-tegra.c162 const struct sdhci_tegra_soc_data *soc_data; member
192 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_readw() local
194 if (unlikely((soc_data->nvquirks & NVQUIRK_FORCE_SDHCI_SPEC_200) && in tegra_sdhci_readw()
228 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_writel() local
239 if (unlikely((soc_data->nvquirks & NVQUIRK_ENABLE_BLOCK_GAP_DET) && in tegra_sdhci_writel()
316 if (!(tegra_host->soc_data->nvquirks & NVQUIRK_NEEDS_PAD_CONTROL)) in tegra_sdhci_is_pad_and_regulator_valid()
339 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_set_tap() local
349 if (soc_data->nvquirks & NVQUIRK_DIS_CARD_CLK_CONFIG_TAP) in tegra_sdhci_set_tap()
357 if (soc_data->nvquirks & NVQUIRK_DIS_CARD_CLK_CONFIG_TAP && in tegra_sdhci_set_tap()
369 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_reset() local
[all …]
Dsdhci-of-at91.c45 const struct sdhci_at91_soc_data *soc_data; member
182 if (priv->soc_data->baseclk_is_generated_internally) in sdhci_at91_set_clks_presets()
183 clk_base_rate = gck_rate / priv->soc_data->divider_for_baseclk; in sdhci_at91_set_clks_presets()
316 const struct sdhci_at91_soc_data *soc_data; in sdhci_at91_probe() local
322 soc_data = of_device_get_match_data(&pdev->dev); in sdhci_at91_probe()
323 if (!soc_data) in sdhci_at91_probe()
326 host = sdhci_pltfm_init(pdev, soc_data->pdata, sizeof(*priv)); in sdhci_at91_probe()
332 priv->soc_data = soc_data; in sdhci_at91_probe()
336 if (soc_data->baseclk_is_generated_internally) { in sdhci_at91_probe()
/drivers/reset/
Dreset-intel-gw.c32 const struct intel_reset_soc *soc_data; member
57 if (data->soc_data->legacy) in id_to_reg_and_bit_offsets()
62 if (data->soc_data->legacy && *rst_req == RCU_RST_REQ) in id_to_reg_and_bit_offsets()
147 if (data->soc_data->legacy) { in intel_reset_xlate()
181 data->soc_data = of_device_get_match_data(dev); in intel_reset_probe()
182 if (!data->soc_data) in intel_reset_probe()
197 data->soc_data->reset_cell_count); in intel_reset_probe()
208 data->rcdev.of_reset_n_cells = data->soc_data->reset_cell_count; in intel_reset_probe()
216 if (data->soc_data->legacy) in intel_reset_probe()
/drivers/iio/adc/
Dingenic-adc.c110 const struct ingenic_adc_soc_data *soc_data; member
251 if (!adc->soc_data->battery_vref_mode) in ingenic_adc_write_raw()
618 *length = adc->soc_data->battery_raw_avail_size; in ingenic_adc_read_avail()
619 *vals = adc->soc_data->battery_raw_avail; in ingenic_adc_read_avail()
623 *length = adc->soc_data->battery_scale_avail_size; in ingenic_adc_read_avail()
624 *vals = adc->soc_data->battery_scale_avail; in ingenic_adc_read_avail()
647 if (adc->soc_data->has_aux_md && engine == 0) { in ingenic_adc_read_chan_info_raw()
710 *val = adc->soc_data->battery_high_vref; in ingenic_adc_read_raw()
711 *val2 = adc->soc_data->battery_high_vref_bits; in ingenic_adc_read_raw()
825 const struct ingenic_adc_soc_data *soc_data; in ingenic_adc_probe() local
[all …]
/drivers/dma/
Ddma-jz4780.c154 const struct jz4780_dma_soc_data *soc_data; member
210 if (jzdma->soc_data->flags & JZ_SOC_DATA_PER_CHAN_PM) { in jz4780_dma_chan_enable()
213 if (jzdma->soc_data->flags & JZ_SOC_DATA_NO_DCKES_DCKEC) in jz4780_dma_chan_enable()
225 if ((jzdma->soc_data->flags & JZ_SOC_DATA_PER_CHAN_PM) && in jz4780_dma_chan_disable()
226 !(jzdma->soc_data->flags & JZ_SOC_DATA_NO_DCKES_DCKEC)) in jz4780_dma_chan_disable()
286 else if (ord > jzdma->soc_data->transfer_ord_max) in jz4780_dma_transfer_size()
287 ord = jzdma->soc_data->transfer_ord_max; in jz4780_dma_transfer_size()
389 !(jzdma->soc_data->flags & JZ_SOC_DATA_BREAK_LINKS)) { in jz4780_dma_prep_slave_sg()
679 const unsigned int soc_flags = jzdma->soc_data->flags; in jz4780_dma_chan_irq()
736 unsigned int nb_channels = jzdma->soc_data->nb_channels; in jz4780_dma_irq_handler()
[all …]
/drivers/thermal/
Dimx_thermal.c221 const struct thermal_soc_data *soc_data = data->socdata; in imx_set_panic_temp() local
227 regmap_write(map, soc_data->panic_alarm_ctrl + REG_CLR, in imx_set_panic_temp()
228 soc_data->panic_alarm_mask); in imx_set_panic_temp()
229 regmap_write(map, soc_data->panic_alarm_ctrl + REG_SET, in imx_set_panic_temp()
230 critical_value << soc_data->panic_alarm_shift); in imx_set_panic_temp()
237 const struct thermal_soc_data *soc_data = data->socdata; in imx_set_alarm_temp() local
247 regmap_write(map, soc_data->high_alarm_ctrl + REG_CLR, in imx_set_alarm_temp()
248 soc_data->high_alarm_mask); in imx_set_alarm_temp()
249 regmap_write(map, soc_data->high_alarm_ctrl + REG_SET, in imx_set_alarm_temp()
250 alarm_value << soc_data->high_alarm_shift); in imx_set_alarm_temp()
[all …]
/drivers/pinctrl/nxp/
Dpinctrl-s32cc.c109 unsigned int mem_regions = ipctl->info->soc_data->mem_regions; in s32_get_region()
693 for (i = 0; i < info->soc_data->npins; i++) { in s32_pinctrl_suspend()
694 pin = &info->soc_data->pins[i]; in s32_pinctrl_suspend()
718 for (i = 0; i < info->soc_data->npins; i++) { in s32_pinctrl_resume()
719 pin = &info->soc_data->pins[i]; in s32_pinctrl_resume()
838 unsigned int mem_regions = info->soc_data->mem_regions; in s32_pinctrl_probe_dt()
876 ipctl->regions[i].pin_range = &info->soc_data->mem_pin_ranges[i]; in s32_pinctrl_probe_dt()
913 const struct s32_pinctrl_soc_data *soc_data) in s32_pinctrl_probe() argument
923 if (!soc_data || !soc_data->pins || !soc_data->npins) { in s32_pinctrl_probe()
932 info->soc_data = soc_data; in s32_pinctrl_probe()
[all …]
Dpinctrl-s32.h46 const struct s32_pinctrl_soc_data *soc_data; member
58 const struct s32_pinctrl_soc_data *soc_data);
/drivers/soc/fsl/
Dguts.c186 const struct fsl_soc_data *soc_data; in fsl_guts_init() local
199 soc_data = match->data; in fsl_guts_init()
247 if (soc_data) in fsl_guts_init()
248 soc_uid = fsl_guts_get_soc_uid(soc_data->sfp_compat, in fsl_guts_init()
249 soc_data->uid_offset); in fsl_guts_init()
/drivers/clk/imx/
Dclk-imx8-acm.c72 const struct imx8_acm_soc_data *soc_data; member
349 priv->soc_data = of_device_get_match_data(dev); in imx8_acm_clk_probe()
367 sels = priv->soc_data->sels; in imx8_acm_clk_probe()
368 for (i = 0; i < priv->soc_data->num_sels; i++) { in imx8_acm_clk_probe()
440 sels = priv->soc_data->sels; in imx8_acm_runtime_suspend()
442 for (i = 0; i < priv->soc_data->num_sels; i++) in imx8_acm_runtime_suspend()
454 sels = priv->soc_data->sels; in imx8_acm_runtime_resume()
456 for (i = 0; i < priv->soc_data->num_sels; i++) in imx8_acm_runtime_resume()
/drivers/soc/rockchip/
Dio-domain.c77 const struct rockchip_iodomain_soc_data *soc_data; member
137 ret = regmap_write(iod->grf, iod->soc_data->grf_offset, val); in rockchip_iodomain_write()
590 iod->soc_data = match->data; in rockchip_iodomain_probe()
592 if (iod->soc_data->write) in rockchip_iodomain_probe()
593 iod->write = iod->soc_data->write; in rockchip_iodomain_probe()
611 const char *supply_name = iod->soc_data->supply_names[i]; in rockchip_iodomain_probe()
673 if (iod->soc_data->init) in rockchip_iodomain_probe()
674 iod->soc_data->init(iod); in rockchip_iodomain_probe()
/drivers/clk/
Dclk-aspeed.c384 const struct aspeed_clk_soc_data *soc_data; in aspeed_clk_probe() local
415 soc_data = of_device_get_match_data(dev); in aspeed_clk_probe()
416 if (!soc_data) { in aspeed_clk_probe()
438 hw = soc_data->calc_pll("mpll", val); in aspeed_clk_probe()
451 soc_data->div_table, in aspeed_clk_probe()
460 soc_data->mac_div_table, in aspeed_clk_probe()
493 soc_data->div_table, in aspeed_clk_probe()
502 soc_data->div_table, in aspeed_clk_probe()
525 3, 0, soc_data->eclk_div_table, in aspeed_clk_probe()
/drivers/phy/cadence/
Dcdns-dphy-rx.c173 const struct cdns_dphy_soc_data *soc_data = NULL; in cdns_dphy_rx_configure() local
179 soc_data = soc->data; in cdns_dphy_rx_configure()
180 if (!soc || (soc_data && !soc_data->has_hw_cmn_rstb)) { in cdns_dphy_rx_configure()
/drivers/i2c/busses/
Di2c-rk3x.c197 const struct rk3x_i2c_soc_data *soc_data; member
883 ret = i2c->soc_data->calc_timings(clk_rate, t, &calc); in rk3x_i2c_adapt_div()
940 if (i2c->soc_data->calc_timings(ndata->new_rate, &i2c->t, in rk3x_i2c_clk_notifier_cb()
1254 i2c->soc_data = match->data; in rk3x_i2c_probe()
1283 if (i2c->soc_data->grf_offset >= 0) { in rk3x_i2c_probe()
1299 if (i2c->soc_data == &rv1126_soc_data && bus_nr == 2) in rk3x_i2c_probe()
1305 ret = regmap_write(grf, i2c->soc_data->grf_offset, value); in rk3x_i2c_probe()
1328 if (i2c->soc_data->calc_timings == rk3x_i2c_v0_calc_timings) { in rk3x_i2c_probe()
/drivers/dma/ti/
Dk3-udma-private.c171 const struct udma_oes_offsets *oes = &ud->soc_data->oes; in xudma_pktdma_tflow_get_irq()
179 const struct udma_oes_offsets *oes = &ud->soc_data->oes; in xudma_pktdma_rflow_get_irq()
/drivers/gpu/drm/rockchip/
Drockchip_lvds.c55 const struct rockchip_lvds_soc_data *soc_data; member
622 drm_encoder_helper_add(encoder, lvds->soc_data->helper_funcs); in rockchip_lvds_bind()
685 encoder_funcs = lvds->soc_data->helper_funcs; in rockchip_lvds_unbind()
715 lvds->soc_data = match->data; in rockchip_lvds_probe()
724 ret = lvds->soc_data->probe(pdev, lvds); in rockchip_lvds_probe()
/drivers/spi/
Dspi-tegra210-quad.c230 const struct tegra_qspi_soc_data *soc_data; member
724 if (!tqspi->soc_data->has_dma) in tegra_qspi_deinit_dma()
757 if (!tqspi->soc_data->has_dma) in tegra_qspi_init_dma()
1070 if (tqspi->soc_data->supports_tpm) in tegra_qspi_combined_seq_xfer()
1206 if (tqspi->soc_data->supports_tpm) in tegra_qspi_non_combined_seq_xfer()
1303 if (!tqspi->soc_data->cmb_xfer_capable || transfer_count != 3) in tegra_qspi_validate_cmb_seq()
1313 if (!tqspi->soc_data->has_dma && xfer->len > (QSPI_FIFO_DEPTH << 2)) in tegra_qspi_validate_cmb_seq()
1566 tqspi->soc_data = device_get_match_data(&pdev->dev); in tegra_qspi_probe()
1567 master->num_chipselect = tqspi->soc_data->cs_count; in tegra_qspi_probe()
/drivers/pmdomain/mediatek/
Dmtk-pm-domains.c55 const struct scpsys_soc_data *soc_data; member
327 if (id >= scpsys->soc_data->num_domains) { in scpsys_add_one_domain()
332 domain_data = &scpsys->soc_data->domains_data[id]; in scpsys_add_one_domain()
626 scpsys->soc_data = soc; in scpsys_probe()

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