| /drivers/soc/tegra/fuse/ |
| D | fuse-tegra30.c | 106 .spare = 0x144,
122 .spare = 0x180,
278 .spare = 0x200,
449 .spare = 0x280,
507 .spare = 0x280,
600 .spare = 0x280,
665 .spare = 0x280,
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| D | fuse.h | 23 unsigned int spare; member
73 u32 __init tegra_fuse_read_spare(unsigned int spare);
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| D | fuse-tegra.c | 276 u32 __init tegra_fuse_read_spare(unsigned int spare) in tegra_fuse_read_spare() argument
278 unsigned int offset = fuse->soc->info->spare + spare * 4; in tegra_fuse_read_spare()
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| /drivers/mtd/nand/raw/ |
| D | mtk_nand.c | 323 u32 fmt, spare, i; in mtk_nfc_hw_runtime_config() local
328 spare = mtk_nand->spare_per_sector; in mtk_nfc_hw_runtime_config()
365 spare >>= 1; in mtk_nfc_hw_runtime_config()
368 if (nfc->caps->spare_size[i] == spare) in mtk_nfc_hw_runtime_config()
373 dev_err(nfc->dev, "invalid spare size %d\n", spare); in mtk_nfc_hw_runtime_config()
945 u32 spare = mtk_nand->spare_per_sector; in mtk_nfc_read_subpage() local
958 column = start * (chip->ecc.size + spare); in mtk_nfc_read_subpage()
960 len = sectors * chip->ecc.size + (raw ? sectors * spare : 0); in mtk_nfc_read_subpage()
1198 const u8 *spare = nfc->caps->spare_size; in mtk_nfc_set_spare_per_sector() local
1211 if (*sps >= spare[i] && spare[i] >= spare[closest_spare]) { in mtk_nfc_set_spare_per_sector()
[all …]
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| D | marvell_nand.c | 954 u8 *spare, int spare_len, in marvell_nfc_check_empty_chunk() argument
968 if (!spare) in marvell_nfc_check_empty_chunk()
974 spare, spare_len, chip->ecc.strength); in marvell_nfc_check_empty_chunk()
1305 u8 *spare, unsigned int spare_len, in marvell_nfc_hw_ecc_bch_read_chunk() argument
1364 marvell_nfc_xfer_data_in_pio(nfc, spare, in marvell_nfc_hw_ecc_bch_read_chunk()
1366 spare += FIFO_DEPTH * BCH_SEQ_READS; in marvell_nfc_hw_ecc_bch_read_chunk()
1377 u8 *data = buf, *spare = chip->oob_poi; in marvell_nfc_hw_ecc_bch_read_page() local
1403 spare, spare_len, page); in marvell_nfc_hw_ecc_bch_read_page()
1409 spare += spare_len; in marvell_nfc_hw_ecc_bch_read_page()
1567 const u8 *spare, unsigned int spare_len, in marvell_nfc_hw_ecc_bch_write_chunk() argument
[all …]
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| D | lpc32xx_slc.c | 405 static void lpc32xx_slc_ecc_copy(uint8_t *spare, const uint32_t *ecc, int count) in lpc32xx_slc_ecc_copy() argument
412 spare[i + 2] = (uint8_t)(ce & 0xFF); in lpc32xx_slc_ecc_copy()
414 spare[i + 1] = (uint8_t)(ce & 0xFF); in lpc32xx_slc_ecc_copy()
416 spare[i] = (uint8_t)(ce & 0xFF); in lpc32xx_slc_ecc_copy()
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| /drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/ |
| D | smu11_driver_if_vangogh.h | 150 uint8_t spare[2]; member
173 uint16_t spare; member
202 uint16_t spare; member
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| D | smu13_driver_if_v13_0_5.h | 91 uint16_t spare; member
124 uint8_t spare[3]; member
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| D | smu13_driver_if_yellow_carp.h | 136 uint8_t spare[3]; member
164 uint16_t spare; member
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| D | smu12_driver_if.h | 130 uint8_t spare[2]; member
198 uint16_t spare; member
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| D | smu13_driver_if_v13_0_4.h | 137 uint8_t spare[3]; member
165 uint16_t spare; //[centi] member
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| /drivers/firmware/ |
| D | qcom_scm.c | 774 int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare) in qcom_scm_restore_sec_cfg() argument
781 .args[1] = spare, in qcom_scm_restore_sec_cfg()
793 int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size) in qcom_scm_iommu_secure_ptbl_size() argument
799 .args[0] = spare, in qcom_scm_iommu_secure_ptbl_size()
814 int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare) in qcom_scm_iommu_secure_ptbl_init() argument
823 .args[2] = spare, in qcom_scm_iommu_secure_ptbl_init()
838 int qcom_scm_iommu_set_cp_pool_size(u32 spare, u32 size) in qcom_scm_iommu_set_cp_pool_size() argument
845 .args[1] = spare, in qcom_scm_iommu_set_cp_pool_size()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| D | dcn31_smu.h | 145 uint8_t spare[3]; member
173 uint16_t spare; member
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| /drivers/s390/char/ |
| D | sclp_diag.h | 53 u8 spare; member
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| D | diag_ftp.c | 63 u64 spare; member
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| /drivers/gpu/drm/amd/pm/powerplay/inc/ |
| D | smu74.h | 227 uint8_t spare; member
473 uint8_t spare[2]; member
807 uint32_t spare; member
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| D | smu8_fusion.h | 37 uint8_t spare[3]; member
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| D | smu72.h | 200 uint8_t spare; member
428 uint8_t spare[2]; member
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| D | dcn314_smu.h | 64 uint8_t spare[3]; member
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| D | dcn315_smu.h | 83 uint8_t spare[3]; member
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| D | dcn316_smu.h | 91 uint8_t spare[3]; member
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| D | dcn301_smu.h | 121 uint8_t spare[2]; member
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| /drivers/scsi/sym53c8xx_2/ |
| D | sym_nvram.h | 156 u_short spare[29]; member
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| /drivers/iommu/arm/arm-smmu/ |
| D | qcom_iommu.c | 588 unsigned int spare = 0; in qcom_iommu_sec_ptbl_init() local
598 ret = qcom_scm_iommu_secure_ptbl_size(spare, &psize); in qcom_iommu_sec_ptbl_init()
616 ret = qcom_scm_iommu_secure_ptbl_init(paddr, psize, spare); in qcom_iommu_sec_ptbl_init()
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| /drivers/net/ |
| D | gtp.c | 282 hdr->spare[0] = 0xff; in gtp0_build_echo_msg()
283 hdr->spare[1] = 0xff; in gtp0_build_echo_msg()
284 hdr->spare[2] = 0xff; in gtp0_build_echo_msg()
748 gtp0->spare[0] = gtp0->spare[1] = gtp0->spare[2] = 0xff; in gtp0_push_header()
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