Home
last modified time | relevance | path

Searched refs:sw_format_ver (Results 1 – 7 of 7) sorted by relevance

/drivers/net/ethernet/mellanox/mlx5/core/steering/
Ddr_domain.c11 (dmn)->info.caps.sw_format_ver <= MLX5_STEERING_FORMAT_CONNECTX_7))
15 return dmn->info.caps.sw_format_ver >= MLX5_STEERING_FORMAT_CONNECTX_6DX && in mlx5dr_domain_is_support_ptrn_arg()
167 dmn->ste_ctx = mlx5dr_ste_get_ctx(dmn->info.caps.sw_format_ver); in dr_domain_init_resources()
Ddr_matcher.c111 return (caps->sw_format_ver >= MLX5_STEERING_FORMAT_CONNECTX_6DX) || in dr_matcher_supp_vxlan_gpe()
152 return (caps->sw_format_ver >= MLX5_STEERING_FORMAT_CONNECTX_6DX) || in dr_matcher_supp_tnl_geneve()
269 return (caps->sw_format_ver >= MLX5_STEERING_FORMAT_CONNECTX_6DX) || in dr_matcher_supp_icmp_v4()
275 return (caps->sw_format_ver >= MLX5_STEERING_FORMAT_CONNECTX_6DX) || in dr_matcher_supp_icmp_v6()
Ddr_dbg.c317 format_ver = rule->matcher->tbl->dmn->info.caps.sw_format_ver; in dr_dump_rule()
Ddr_cmd.c121 caps->sw_format_ver = MLX5_CAP_GEN(mdev, steering_format_version); in mlx5dr_cmd_query_device()
Ddr_types.h894 u8 sw_format_ver; member
Ddr_ste.c24 return caps->sw_format_ver > MLX5_STEERING_FORMAT_CONNECTX_5; in mlx5dr_ste_supp_ttl_cs_recalc()
Ddr_action.c2020 dmn->info.caps.sw_format_ver >= MLX5_STEERING_FORMAT_CONNECTX_6DX) { in dr_action_create_modify_action()