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Searched refs:tegra_fuse_read_spare (Results 1 – 6 of 6) sorted by relevance

/drivers/soc/tegra/fuse/
Dspeedo-tegra30.c94 bit_minus1 = tegra_fuse_read_spare(LP_SPEEDO_BIT_MINUS1); in fuse_speedo_calib()
95 bit_minus1 |= tegra_fuse_read_spare(LP_SPEEDO_BIT_MINUS1_R); in fuse_speedo_calib()
96 bit_minus2 = tegra_fuse_read_spare(LP_SPEEDO_BIT_MINUS2); in fuse_speedo_calib()
97 bit_minus2 |= tegra_fuse_read_spare(LP_SPEEDO_BIT_MINUS2_R); in fuse_speedo_calib()
100 bit_minus1 = tegra_fuse_read_spare(G_SPEEDO_BIT_MINUS1); in fuse_speedo_calib()
101 bit_minus1 |= tegra_fuse_read_spare(G_SPEEDO_BIT_MINUS1_R); in fuse_speedo_calib()
102 bit_minus2 = tegra_fuse_read_spare(G_SPEEDO_BIT_MINUS2); in fuse_speedo_calib()
103 bit_minus2 |= tegra_fuse_read_spare(G_SPEEDO_BIT_MINUS2_R); in fuse_speedo_calib()
Dspeedo-tegra20.c72 reg = tegra_fuse_read_spare(i) | in tegra20_init_speedo_data()
73 tegra_fuse_read_spare(i + CPU_SPEEDO_REDUND_OFFS); in tegra20_init_speedo_data()
87 reg = tegra_fuse_read_spare(i) | in tegra20_init_speedo_data()
88 tegra_fuse_read_spare(i + SOC_SPEEDO_REDUND_OFFS); in tegra20_init_speedo_data()
Dspeedo-tegra210.c52 return tegra_fuse_read_spare(4) << 2 | in get_speedo_revision()
53 tegra_fuse_read_spare(3) << 1 | in get_speedo_revision()
54 tegra_fuse_read_spare(2) << 0; in get_speedo_revision()
Dtegra-apbmisc.c146 if (chip_id == TEGRA20 && (tegra_fuse_read_spare(18) || in tegra_init_revision()
147 tegra_fuse_read_spare(19))) in tegra_init_revision()
Dfuse.h73 u32 __init tegra_fuse_read_spare(unsigned int spare);
Dfuse-tegra.c276 u32 __init tegra_fuse_read_spare(unsigned int spare) in tegra_fuse_read_spare() function