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Searched refs:txdiv0 (Results 1 – 2 of 2) sorted by relevance

/drivers/phy/mediatek/
Dphy-mtk-mipi-dsi-mt8183.c51 unsigned int txdiv, txdiv0; in mtk_mipi_tx_pll_enable() local
58 txdiv0 = 0; in mtk_mipi_tx_pll_enable()
61 txdiv0 = 1; in mtk_mipi_tx_pll_enable()
64 txdiv0 = 2; in mtk_mipi_tx_pll_enable()
67 txdiv0 = 3; in mtk_mipi_tx_pll_enable()
70 txdiv0 = 4; in mtk_mipi_tx_pll_enable()
83 mtk_phy_update_field(base + MIPITX_PLL_CON1, RG_DSI_PLL_POSDIV, txdiv0); in mtk_mipi_tx_pll_enable()
Dphy-mtk-mipi-dsi-mt8173.c126 u8 txdiv, txdiv0, txdiv1; in mtk_mipi_tx_pll_prepare() local
133 txdiv0 = 0; in mtk_mipi_tx_pll_prepare()
137 txdiv0 = 1; in mtk_mipi_tx_pll_prepare()
141 txdiv0 = 2; in mtk_mipi_tx_pll_prepare()
145 txdiv0 = 2; in mtk_mipi_tx_pll_prepare()
149 txdiv0 = 2; in mtk_mipi_tx_pll_prepare()
185 FIELD_PREP(RG_DSI_MPPLL_TXDIV0, txdiv0) | in mtk_mipi_tx_pll_prepare()