| /drivers/net/ethernet/marvell/octeontx2/af/ |
| D | rpm.c | 398 u64 val_lo, val_hi; in rpm_get_rx_stats() local
415 val_hi = rpm_read(rpm, 0, RPMX_MTI_STAT_DATA_HI_CDC); in rpm_get_rx_stats()
417 *rx_stat = (val_hi << 32 | val_lo); in rpm_get_rx_stats()
426 u64 val_lo, val_hi; in rpm_get_tx_stats() local
438 val_hi = rpm_read(rpm, 0, RPMX_MTI_STAT_DATA_HI_CDC); in rpm_get_tx_stats()
440 *tx_stat = (val_hi << 32 | val_lo); in rpm_get_tx_stats()
675 u64 val_lo, val_hi; in rpm_get_fec_stats() local
687 val_hi = rpm_read(rpm, lmac_id, RPMX_MTI_FCFECX_CW_HI); in rpm_get_fec_stats()
688 rsp->fec_corr_blks = (val_hi << 16 | val_lo); in rpm_get_fec_stats()
691 val_hi = rpm_read(rpm, lmac_id, RPMX_MTI_FCFECX_CW_HI); in rpm_get_fec_stats()
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| D | rvu_npc_fs.h | 19 u64 val_hi, u64 mask_lo, u64 mask_hi, u8 intf);
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| D | rvu_npc_fs.c | 724 u64 val_hi, u64 mask_lo, u64 mask_hi, u8 intf) in npc_update_entry() argument
758 kw2 |= (val_hi << shift); in npc_update_entry()
772 kw2 |= (val_hi << shift); in npc_update_entry()
774 kw3 = shift ? val_hi >> (64 - shift) : 0; in npc_update_entry()
813 u64 val_lo, val_hi; in npc_update_ipv6_flow() local
826 val_hi = (u64)src_ip[0] << 32 | src_ip[1]; in npc_update_ipv6_flow()
829 npc_update_entry(rvu, NPC_SIP_IPV6, entry, val_lo, val_hi, in npc_update_ipv6_flow()
840 val_hi = (u64)dst_ip[0] << 32 | dst_ip[1]; in npc_update_ipv6_flow()
843 npc_update_entry(rvu, NPC_DIP_IPV6, entry, val_lo, val_hi, in npc_update_ipv6_flow()
919 #define NPC_WRITE_FLOW(field, member, val_lo, val_hi, mask_lo, mask_hi) \ in npc_update_flow() argument
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| /drivers/char/mwave/ |
| D | 3780i.c | 624 unsigned short val_lo, val_hi; in dsp3780I_ReadIStore() local
627 val_hi = InWordDsp(DSP_MsaDataDSISHigh); in dsp3780I_ReadIStore()
631 if(put_user(val_hi, pusBuffer++)) in dsp3780I_ReadIStore()
636 uCount, val_lo, val_hi); in dsp3780I_ReadIStore()
673 unsigned short val_lo, val_hi; in dsp3780I_WriteIStore() local
676 if(get_user(val_hi, pusBuffer++)) in dsp3780I_WriteIStore()
680 OutWordDsp(DSP_MsaDataDSISHigh, val_hi); in dsp3780I_WriteIStore()
685 uCount, val_lo, val_hi); in dsp3780I_WriteIStore()
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| /drivers/dma/ |
| D | fsldma.h | 209 u32 val_hi = in_le32((u32 __iomem *)addr + 1); in fsl_ioread64() local
211 return ((u64)val_hi << 32) + val_lo; in fsl_ioread64()
222 u32 val_hi = in_be32((u32 __iomem *)addr); in fsl_ioread64be() local
225 return ((u64)val_hi << 32) + val_lo; in fsl_ioread64be()
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| /drivers/media/pci/cx18/ |
| D | cx18-gpio.c | 43 u32 val_hi = cx->gpio_val >> 16; in gpio_write() local
51 cx18_write_reg_expect(cx, (dir_hi << 16) | val_hi, in gpio_write()
52 CX18_REG_GPIO_OUT2, val_hi, dir_hi); in gpio_write()
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| /drivers/perf/arm_cspmu/ |
| D | arm_cspmu.c | 140 u32 val_lo, val_hi; in read_reg64_hilohi() local
150 val_hi = readl(addr + 4); in read_reg64_hilohi()
152 } while (val_hi != readl(addr + 4)); in read_reg64_hilohi()
154 val = (((u64)val_hi << 32) | val_lo); in read_reg64_hilohi()
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| /drivers/edac/ |
| D | xgene_edac.c | 664 u32 val_hi; in xgene_edac_pmd_l2_check() local
674 val_hi = readl(pg_e + MEMERR_L2C_L2EAHR_PAGE_OFFSET); in xgene_edac_pmd_l2_check()
677 ctx->pmd, val, val_hi, val_lo); in xgene_edac_pmd_l2_check()
726 val_hi = readl(pg_d + CPUX_L2C_L2RTOAHR_PAGE_OFFSET); in xgene_edac_pmd_l2_check()
729 ctx->pmd, val, val_hi, val_lo); in xgene_edac_pmd_l2_check()
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| /drivers/net/ethernet/broadcom/bnx2x/ |
| D | bnx2x_init_ops.h | 199 u32 val_hi) in bnx2x_wr_64() argument
204 wb_write[1] = val_hi; in bnx2x_wr_64()
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| /drivers/firmware/broadcom/ |
| D | bcm47xx_sprom.c | 97 u16 *val_lo, u16 *val_hi, bool fallback) in NVRAM_READ_VAL()
113 *val_hi = (val & 0xFFFF0000U) >> 16; in NVRAM_READ_VAL()
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