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Searched refs:value2 (Results 1 – 25 of 31) sorted by relevance

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/drivers/clocksource/
Dacpi_pm.c148 u64 value1, value2; in verify_pmtmr_rate() local
154 value2 = clocksource_acpi_pm.read(&clocksource_acpi_pm); in verify_pmtmr_rate()
155 delta = (value2 - value1) & ACPI_PM_MASK; in verify_pmtmr_rate()
178 u64 value1, value2; in init_acpi_pm_clocksource() local
189 value2 = clocksource_acpi_pm.read(&clocksource_acpi_pm); in init_acpi_pm_clocksource()
190 if (value2 == value1) in init_acpi_pm_clocksource()
192 if (value2 > value1) in init_acpi_pm_clocksource()
194 if ((value2 < value1) && ((value2) < 0xFFF)) in init_acpi_pm_clocksource()
197 value1, value2); in init_acpi_pm_clocksource()
/drivers/gpu/drm/amd/display/dc/dce60/
Ddce60_timing_generator.c133 uint32_t value2 = dm_read_reg(tg->ctx, addr2); in dce60_timing_generator_enable_advanced_request() local
145 value2, in dce60_timing_generator_enable_advanced_request()
156 value2, in dce60_timing_generator_enable_advanced_request()
175 dm_write_reg(tg->ctx, addr2, value2); in dce60_timing_generator_enable_advanced_request()
/drivers/iio/adc/
Dcpcap-adc.c539 unsigned short value2 = 0; in cpcap_adc_setup_bank() local
547 value2 |= CPCAP_BIT_THERMBIAS_EN; in cpcap_adc_setup_bank()
550 value2); in cpcap_adc_setup_bank()
569 value2 |= ato->adc_ps_factor_in; in cpcap_adc_setup_bank()
570 value2 |= ato->atox_ps_factor_in; in cpcap_adc_setup_bank()
575 value2 |= ato->adc_ps_factor_out; in cpcap_adc_setup_bank()
576 value2 |= ato->atox_ps_factor_out; in cpcap_adc_setup_bank()
600 value2); in cpcap_adc_setup_bank()
Dti-ads131e08.c501 int *value2, long mask) in ads131e08_read_raw() argument
531 *value2 = ADS131E08_NUM_DATA_BITS(st->data_rate) - 1; in ads131e08_read_raw()
547 int value2, long mask) in ads131e08_write_raw() argument
/drivers/iio/pressure/
Ddlhl60d.c140 int *value2, long mask) in dlh_read_raw() argument
178 *value2 = rem; in dlh_read_raw()
183 *value2 = DLH_NUM_TEMP_BITS; in dlh_read_raw()
193 *value2 = 100 * st->info.osdig * 100000; in dlh_read_raw()
/drivers/gpu/drm/amd/display/dc/dcn201/
Ddcn201_link_encoder.c55 uint32_t value1, value2; in dcn201_link_encoder_get_max_link_cap() local
60 RDPCS_PHY_DPALT_DP4, &value2); in dcn201_link_encoder_get_max_link_cap()
63 if (!value1 && !value2 && link_settings->lane_count > LANE_COUNT_TWO) in dcn201_link_encoder_get_max_link_cap()
/drivers/cdx/controller/
Dbitfield.h56 field2, value2, \ argument
63 CDX_INSERT_FIELD(field2, (value2)) | \
/drivers/net/wireless/ath/ath9k/
Dar9003_phy.c1076 s32 value, value2; in ar9003_hw_ani_control() local
1195 value2 = firstep_table[level] - in ar9003_hw_ani_control()
1198 if (value2 < ATH9K_SIG_FIRSTEP_SETTING_MIN) in ar9003_hw_ani_control()
1199 value2 = ATH9K_SIG_FIRSTEP_SETTING_MIN; in ar9003_hw_ani_control()
1200 if (value2 > ATH9K_SIG_FIRSTEP_SETTING_MAX) in ar9003_hw_ani_control()
1201 value2 = ATH9K_SIG_FIRSTEP_SETTING_MAX; in ar9003_hw_ani_control()
1204 AR_PHY_FIND_SIG_LOW_FIRSTEP_LOW, value2); in ar9003_hw_ani_control()
1221 value2, in ar9003_hw_ani_control()
1260 value2 = cycpwrThr1_table[level] - in ar9003_hw_ani_control()
1263 if (value2 < ATH9K_SIG_SPUR_IMM_SETTING_MIN) in ar9003_hw_ani_control()
[all …]
/drivers/media/usb/gspca/
Dsn9c20x.c1368 u16 value2; in set_hvflip() local
1405 i2c_r2(gspca_dev, 0x20, &value2); in set_hvflip()
1406 value2 &= ~0xc0a0; in set_hvflip()
1408 value2 |= 0x8080; in set_hvflip()
1410 value2 |= 0x4020; in set_hvflip()
1411 i2c_w2(gspca_dev, 0x20, value2); in set_hvflip()
1416 i2c_r2(gspca_dev, 0x20, &value2); in set_hvflip()
1417 value2 &= ~0x0003; in set_hvflip()
1419 value2 |= 0x0002; in set_hvflip()
1421 value2 |= 0x0001; in set_hvflip()
[all …]
/drivers/ata/
Dpata_pdc2027x.c73 u8 value0, value1, value2; member
91 u8 value0, value1, value2; member
308 ctcr1 |= (pdc2027x_pio_timing_tbl[pio].value2 << 24); in pdc2027x_set_piomode()
350 (pdc2027x_udma_timing_tbl[udma_mode].value2 << 16); in pdc2027x_set_dmamode()
Dpata_macio.c446 unsigned int value, value2 = 0; in pata_macio_default_timings() local
451 value2 = 0x00033031; in pata_macio_default_timings()
456 value2 = 0x00002921; in pata_macio_default_timings()
471 priv->treg[0][1] = priv->treg[1][1] = value2; in pata_macio_default_timings()
/drivers/media/platform/qcom/camss/
Dcamss-ispif.c165 u32 value0, value1, value2, value3, value4, value5; in ispif_isr_8x96() local
169 value2 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_2(0)); in ispif_isr_8x96()
176 writel_relaxed(value2, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_2(0)); in ispif_isr_8x96()
201 if (unlikely(value2 & ISPIF_VFE_m_IRQ_STATUS_2_RDI2_OVERFLOW)) in ispif_isr_8x96()
233 u32 value0, value1, value2; in ispif_isr_8x16() local
237 value2 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_2(0)); in ispif_isr_8x16()
241 writel_relaxed(value2, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_2(0)); in ispif_isr_8x16()
260 if (unlikely(value2 & ISPIF_VFE_m_IRQ_STATUS_2_RDI2_OVERFLOW)) in ispif_isr_8x16()
/drivers/pinctrl/intel/
Dpinctrl-intel.c636 u32 value2; in intel_config_get_debounce() local
643 value2 = readl(padcfg2); in intel_config_get_debounce()
645 if (!(value2 & PADCFG2_DEBEN)) in intel_config_get_debounce()
648 v = (value2 & PADCFG2_DEBOUNCE_MASK) >> PADCFG2_DEBOUNCE_SHIFT; in intel_config_get_debounce()
790 u32 value0, value2; in intel_config_set_debounce() local
801 value2 = readl(padcfg2); in intel_config_set_debounce()
805 value2 &= ~(PADCFG2_DEBEN | PADCFG2_DEBOUNCE_MASK); in intel_config_set_debounce()
818 value2 |= v << PADCFG2_DEBOUNCE_SHIFT; in intel_config_set_debounce()
819 value2 |= PADCFG2_DEBEN; in intel_config_set_debounce()
823 writel(value2, padcfg2); in intel_config_set_debounce()
/drivers/acpi/
Dacpi_lpss.c963 u32 value2 = LPSS_PMCSR_D3hot; in lpss_iosf_enter_d3_state() local
993 LPSS_IOSF_PMCSR, value2, mask2); in lpss_iosf_enter_d3_state()
996 LPSS_IOSF_PMCSR, value2, mask2); in lpss_iosf_enter_d3_state()
1012 u32 value2 = LPSS_PMCSR_D0; in lpss_iosf_exit_d3_state() local
1026 LPSS_IOSF_PMCSR, value2, mask2); in lpss_iosf_exit_d3_state()
1029 LPSS_IOSF_PMCSR, value2, mask2); in lpss_iosf_exit_d3_state()
Dacpi_processor.c41 u8 value2 = 0; in acpi_processor_errata_piix4() local
121 pci_read_config_byte(dev, 0x77, &value2); in acpi_processor_errata_piix4()
122 if ((value1 & 0x80) || (value2 & 0x80)) in acpi_processor_errata_piix4()
/drivers/media/platform/nvidia/tegra-vde/
Dh264.c164 u32 value2 = frame ? ((frame->chroma_atoms_pitch << 6) | 1) : 0; in tegra_vde_setup_frameid() local
170 tegra_vde_writel(vde, value2, vde->frameid, 0x280 + frameid * 4); in tegra_vde_setup_frameid()
191 u32 value1, u32 value2) in tegra_vde_setup_iram_entry() argument
195 trace_vde_setup_iram_entry(table, row, value1, value2); in tegra_vde_setup_iram_entry()
198 iram_tables[0x20 * table + row * 2 + 1] = value2; in tegra_vde_setup_iram_entry()
/drivers/md/persistent-data/
Ddm-btree.h76 int (*equal)(void *context, const void *value1, const void *value2);
/drivers/firmware/
Dstratix10-rsu.c231 unsigned long long *value2 = (unsigned long long *)data->kaddr2; in rsu_dcmf_version_callback() local
236 priv->dcmf_version.dcmf2 = FIELD_GET(RSU_DCMF2_MASK, *value2); in rsu_dcmf_version_callback()
237 priv->dcmf_version.dcmf3 = FIELD_GET(RSU_DCMF3_MASK, *value2); in rsu_dcmf_version_callback()
/drivers/video/fbdev/
Dffb.c335 u32 value2; member
449 upa_writel(0, &dac->value2); in ffb_switch_from_graph()
452 FFB_DAC_CUR_CTRL_P1), &dac->value2); in ffb_switch_from_graph()
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_link_encoder.c1223 uint32_t value2 = 0; in dcn10_link_encoder_update_mst_stream_allocation_table() local
1329 DP_MSE_16_MTP_KEEPOUT, &value2); in dcn10_link_encoder_update_mst_stream_allocation_table()
1332 if (!value1 && !value2) in dcn10_link_encoder_update_mst_stream_allocation_table()
/drivers/net/ethernet/sfc/falcon/
Dbitfield.h277 field2, value2, \ argument
287 EF4_INSERT_FIELD_NATIVE((min), (max), field2, (value2)) | \
/drivers/gpu/drm/amd/display/dc/dce/
Ddce_link_encoder.c1503 uint32_t value2 = 0; in dce110_link_encoder_update_mst_stream_allocation_table() local
1608 DP_MSE_16_MTP_KEEPOUT, &value2); in dce110_link_encoder_update_mst_stream_allocation_table()
1611 if (!value1 && !value2) in dce110_link_encoder_update_mst_stream_allocation_table()
/drivers/net/ethernet/sfc/siena/
Dbitfield.h277 field2, value2, \ argument
296 EFX_INSERT_FIELD_NATIVE((min), (max), field2, (value2)) | \
/drivers/net/ethernet/sfc/
Dbitfield.h279 field2, value2, \ argument
298 EFX_INSERT_FIELD_NATIVE((min), (max), field2, (value2)) | \
/drivers/scsi/qla2xxx/
Dqla_nx2.c3089 uint32_t addr1, addr2, value1, value2, data, selVal; in qla8044_minidump_process_rdmdio() local
3108 value2 = rdmdio->value_2; in qla8044_minidump_process_rdmdio()
3120 value2); in qla8044_minidump_process_rdmdio()
3146 selVal = (value2 << 18) | (value1 << 2) | 2; in qla8044_minidump_process_rdmdio()
3165 uint32_t addr1, addr2, value1, value2, poll, r_value; in qla8044_minidump_process_pollwr() local
3173 value2 = pollwr_hdr->value_2; in qla8044_minidump_process_pollwr()
3190 qla8044_wr_reg_indirect(vha, addr2, value2); in qla8044_minidump_process_pollwr()

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