| /drivers/gpu/drm/i915/display/ |
| D | intel_crtc.c | 637 if (h >= ARRAY_SIZE(crtc->debug.vbl.times)) in dbg_vblank_evade()
638 h = ARRAY_SIZE(crtc->debug.vbl.times) - 1; in dbg_vblank_evade()
639 crtc->debug.vbl.times[h]++; in dbg_vblank_evade()
641 crtc->debug.vbl.sum += delta; in dbg_vblank_evade()
642 if (!crtc->debug.vbl.min || delta < crtc->debug.vbl.min) in dbg_vblank_evade()
643 crtc->debug.vbl.min = delta; in dbg_vblank_evade()
644 if (delta > crtc->debug.vbl.max) in dbg_vblank_evade()
645 crtc->debug.vbl.max = delta; in dbg_vblank_evade()
653 crtc->debug.vbl.over++; in dbg_vblank_evade()
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| D | intel_display_debugfs.c | 468 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) in crtc_updates_info()
469 count += crtc->debug.vbl.times[row]; in crtc_updates_info()
474 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) { in crtc_updates_info()
493 if (crtc->debug.vbl.times[row]) { in crtc_updates_info()
494 x = ilog2(crtc->debug.vbl.times[row]); in crtc_updates_info()
503 hdr, crtc->debug.vbl.min); in crtc_updates_info()
505 hdr, crtc->debug.vbl.max); in crtc_updates_info()
507 hdr, div64_u64(crtc->debug.vbl.sum, count)); in crtc_updates_info()
509 hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over); in crtc_updates_info()
531 memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl)); in crtc_updates_write()
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| D | intel_display_types.h | 1496 } vbl; member
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| /drivers/gpu/drm/radeon/ |
| D | radeon_display.c | 1812 u32 stat_crtc = 0, vbl = 0, position = 0; in radeon_get_crtc_scanoutpos() local
1826 vbl = RREG32(EVERGREEN_CRTC_V_BLANK_START_END + in radeon_get_crtc_scanoutpos()
1833 vbl = RREG32(EVERGREEN_CRTC_V_BLANK_START_END + in radeon_get_crtc_scanoutpos()
1840 vbl = RREG32(EVERGREEN_CRTC_V_BLANK_START_END + in radeon_get_crtc_scanoutpos()
1847 vbl = RREG32(EVERGREEN_CRTC_V_BLANK_START_END + in radeon_get_crtc_scanoutpos()
1854 vbl = RREG32(EVERGREEN_CRTC_V_BLANK_START_END + in radeon_get_crtc_scanoutpos()
1861 vbl = RREG32(EVERGREEN_CRTC_V_BLANK_START_END + in radeon_get_crtc_scanoutpos()
1869 vbl = RREG32(AVIVO_D1CRTC_V_BLANK_START_END); in radeon_get_crtc_scanoutpos()
1874 vbl = RREG32(AVIVO_D2CRTC_V_BLANK_START_END); in radeon_get_crtc_scanoutpos()
1884 vbl = (RREG32(RADEON_CRTC_V_TOTAL_DISP) & in radeon_get_crtc_scanoutpos()
[all …]
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_display.h | 34 …age_flip_get_scanoutpos(adev, crtc, vbl, pos) (adev)->mode_info.funcs->page_flip_get_scanoutpos((a… argument
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| D | amdgpu_display.c | 1495 u32 vbl = 0, position = 0; in amdgpu_display_get_crtc_scanoutpos() local
1507 if (amdgpu_display_page_flip_get_scanoutpos(adev, pipe, &vbl, &position) == 0) in amdgpu_display_get_crtc_scanoutpos()
1521 if (vbl > 0) { in amdgpu_display_get_crtc_scanoutpos()
1524 vbl_start = vbl & 0x1fff; in amdgpu_display_get_crtc_scanoutpos()
1525 vbl_end = (vbl >> 16) & 0x1fff; in amdgpu_display_get_crtc_scanoutpos()
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| D | amdgpu_mode.h | 280 u32 *vbl, u32 *position);
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| D | dce_v8_0.c | 207 u32 *vbl, u32 *position) in dce_v8_0_crtc_get_scanoutpos() argument
212 *vbl = RREG32(mmCRTC_V_BLANK_START_END + crtc_offsets[crtc]); in dce_v8_0_crtc_get_scanoutpos()
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| D | dce_v6_0.c | 216 u32 *vbl, u32 *position) in dce_v6_0_crtc_get_scanoutpos() argument
220 *vbl = RREG32(mmCRTC_V_BLANK_START_END + crtc_offsets[crtc]); in dce_v6_0_crtc_get_scanoutpos()
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| D | dce_v10_0.c | 258 u32 *vbl, u32 *position) in dce_v10_0_crtc_get_scanoutpos() argument
263 *vbl = RREG32(mmCRTC_V_BLANK_START_END + crtc_offsets[crtc]); in dce_v10_0_crtc_get_scanoutpos()
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| D | dce_v11_0.c | 282 u32 *vbl, u32 *position) in dce_v11_0_crtc_get_scanoutpos() argument
287 *vbl = RREG32(mmCRTC_V_BLANK_START_END + crtc_offsets[crtc]); in dce_v11_0_crtc_get_scanoutpos()
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| /drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| D | ramnv40.c | 80 u32 vbl = nvkm_rd32(device, 0x600808 + (i * 0x2000)); in nv40_ram_prog() local
83 if (vbl != nvkm_rd32(device, 0x600808 + (i * 0x2000))) { in nv40_ram_prog()
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| /drivers/gpu/drm/ |
| D | drm_vblank.c | 1034 e->event.vbl.sequence = seq; in send_vblank_event()
1040 e->event.vbl.tv_sec = tv.tv_sec; in send_vblank_event()
1041 e->event.vbl.tv_usec = tv.tv_nsec / 1000; in send_vblank_event()
1678 e->event.base.length = sizeof(e->event.vbl); in drm_queue_vblank_event()
1679 e->event.vbl.user_data = vblwait->request.signal; in drm_queue_vblank_event()
1680 e->event.vbl.crtc_id = 0; in drm_queue_vblank_event()
1685 e->event.vbl.crtc_id = crtc->base.id; in drm_queue_vblank_event()
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| D | drm_plane.c | 1368 e->event.vbl.user_data = page_flip->user_data; in drm_mode_page_flip_ioctl()
1369 e->event.vbl.crtc_id = crtc->base.id; in drm_mode_page_flip_ioctl()
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| D | drm_atomic_uapi.c | 953 e->event.vbl.crtc_id = crtc->base.id; in create_vblank_event()
954 e->event.vbl.user_data = user_data; in create_vblank_event()
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| /drivers/video/fbdev/aty/ |
| D | atyfb_base.c | 1770 struct aty_interrupt *vbl; in aty_waitforvblank() local
1776 vbl = &par->vblank; in aty_waitforvblank()
1786 count = vbl->count; in aty_waitforvblank()
1787 ret = wait_event_interruptible_timeout(vbl->wait, in aty_waitforvblank()
1788 count != vbl->count, HZ/10); in aty_waitforvblank()
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| /drivers/video/fbdev/matrox/ |
| D | matroxfb_base.c | 314 int vbl; in matrox_pan_var() local
334 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(minfo, 0) == 0); in matrox_pan_var()
343 if (vbl) { in matrox_pan_var()
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| /drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm.c | 265 u32 *vbl, u32 *position) in dm_crtc_get_scanoutpos() argument
292 *vbl = v_blank_start | (v_blank_end << 16); in dm_crtc_get_scanoutpos()
|