Searched refs:vco_rate (Results 1 – 7 of 7) sorted by relevance
| /drivers/clk/analogbits/ |
| D | wrpll-cln28hpc.c | 148 static u8 __wrpll_calc_divq(u32 target_rate, u64 *vco_rate) in __wrpll_calc_divq() argument
153 if (!vco_rate) { in __wrpll_calc_divq()
161 *vco_rate = MAX_VCO_FREQ; in __wrpll_calc_divq()
164 *vco_rate = MIN_VCO_FREQ; in __wrpll_calc_divq()
167 *vco_rate = (u64)target_rate << divq; in __wrpll_calc_divq()
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| /drivers/gpu/drm/msm/dsi/phy/ |
| D | dsi_phy_28nm.c | 44 unsigned long vco_rate; member
63 unsigned long vco_rate; member
135 if (rate <= lpfr_lut[i].vco_rate) in dsi_pll_28nm_clk_set_rate()
248 unsigned long vco_rate; in dsi_pll_28nm_clk_recalc_rate() local
264 vco_rate = ref_clk * sdm_byp_div; in dsi_pll_28nm_clk_recalc_rate()
278 vco_rate = (ref_clk * (sdm_dc_off + 1)) + in dsi_pll_28nm_clk_recalc_rate()
280 DBG("vco rate = %lu", vco_rate); in dsi_pll_28nm_clk_recalc_rate()
283 DBG("returning vco rate = %lu", vco_rate); in dsi_pll_28nm_clk_recalc_rate()
285 return vco_rate; in dsi_pll_28nm_clk_recalc_rate()
568 cached_state->vco_rate = clk_hw_get_rate(phy->vco_hw); in dsi_28nm_pll_save_state()
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| D | dsi_phy_28nm_8960.c | 49 unsigned long vco_rate; member
147 unsigned long vco_rate; in dsi_pll_28nm_clk_recalc_rate() local
166 vco_rate = (parent_rate / ref_divider) * fb_divider * 2; in dsi_pll_28nm_clk_recalc_rate()
168 vco_rate = 0; in dsi_pll_28nm_clk_recalc_rate()
171 DBG("returning vco rate = %lu", vco_rate); in dsi_pll_28nm_clk_recalc_rate()
173 return vco_rate; in dsi_pll_28nm_clk_recalc_rate()
356 cached_state->vco_rate = clk_hw_get_rate(phy->vco_hw); in dsi_28nm_pll_save_state()
367 cached_state->vco_rate, 0); in dsi_28nm_pll_restore_state()
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| D | dsi_phy_14nm.c | 66 unsigned long vco_rate; member
495 u64 vco_rate, multiplier = BIT(20); in dsi_pll_14nm_vco_recalc_rate() local
514 vco_rate = ref_clk * dec_start; in dsi_pll_14nm_vco_recalc_rate()
516 vco_rate += ((ref_clk * div_frac_start) / multiplier); in dsi_pll_14nm_vco_recalc_rate()
523 vco_rate = DIV_ROUND_UP_ULL(vco_rate, 1000) * 1000; in dsi_pll_14nm_vco_recalc_rate()
525 DBG("returning vco rate = %lu", (unsigned long)vco_rate); in dsi_pll_14nm_vco_recalc_rate()
527 return (unsigned long)vco_rate; in dsi_pll_14nm_vco_recalc_rate()
702 cached_state->vco_rate = clk_hw_get_rate(phy->vco_hw); in dsi_14nm_pll_save_state()
714 cached_state->vco_rate, 0); in dsi_14nm_pll_restore_state()
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| D | dsi_phy_10nm.c | 62 unsigned long vco_rate; member
426 u64 vco_rate = 0x0; in dsi_pll_10nm_vco_recalc_rate() local
450 vco_rate = pll_freq; in dsi_pll_10nm_vco_recalc_rate()
451 pll_10nm->vco_current_rate = vco_rate; in dsi_pll_10nm_vco_recalc_rate()
454 pll_10nm->phy->id, (unsigned long)vco_rate, dec, frac); in dsi_pll_10nm_vco_recalc_rate()
456 return (unsigned long)vco_rate; in dsi_pll_10nm_vco_recalc_rate()
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| D | dsi_phy_7nm.c | 69 unsigned long vco_rate; member
475 u64 vco_rate = 0x0; in dsi_pll_7nm_vco_recalc_rate() local
499 vco_rate = pll_freq; in dsi_pll_7nm_vco_recalc_rate()
500 pll_7nm->vco_current_rate = vco_rate; in dsi_pll_7nm_vco_recalc_rate()
503 pll_7nm->phy->id, (unsigned long)vco_rate, dec, frac); in dsi_pll_7nm_vco_recalc_rate()
505 return (unsigned long)vco_rate; in dsi_pll_7nm_vco_recalc_rate()
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| /drivers/clk/ |
| D | clk-lmk04832.c | 263 unsigned int vco_rate; member
381 unsigned long vco_rate; in lmk04832_vco_recalc_rate() local
406 vco_rate = (prate << FIELD_GET(LMK04832_BIT_PLL2_MISC_REF_2X_EN, in lmk04832_vco_recalc_rate()
409 return vco_rate; in lmk04832_vco_recalc_rate()
499 long vco_rate; in lmk04832_vco_round_rate() local
506 vco_rate = lmk04832_calc_pll2_params(*prate, rate, &n, &p, &r); in lmk04832_vco_round_rate()
507 if (vco_rate < 0) { in lmk04832_vco_round_rate()
509 return vco_rate; in lmk04832_vco_round_rate()
512 if (rate != vco_rate) in lmk04832_vco_round_rate()
515 return vco_rate; in lmk04832_vco_round_rate()
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