Searched refs:vdsc_cfg (Results 1 – 6 of 6) sorted by relevance
/drivers/gpu/drm/display/ |
D | drm_dsc_helper.c | 280 void drm_dsc_set_const_params(struct drm_dsc_config *vdsc_cfg) in drm_dsc_set_const_params() argument 282 if (!vdsc_cfg->rc_model_size) in drm_dsc_set_const_params() 283 vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST; in drm_dsc_set_const_params() 284 vdsc_cfg->rc_edge_factor = DSC_RC_EDGE_FACTOR_CONST; in drm_dsc_set_const_params() 285 vdsc_cfg->rc_tgt_offset_high = DSC_RC_TGT_OFFSET_HI_CONST; in drm_dsc_set_const_params() 286 vdsc_cfg->rc_tgt_offset_low = DSC_RC_TGT_OFFSET_LO_CONST; in drm_dsc_set_const_params() 288 if (vdsc_cfg->bits_per_component <= 10) in drm_dsc_set_const_params() 289 vdsc_cfg->mux_word_size = DSC_MUX_WORD_SIZE_8_10_BPC; in drm_dsc_set_const_params() 291 vdsc_cfg->mux_word_size = DSC_MUX_WORD_SIZE_12_BPC; in drm_dsc_set_const_params() 307 void drm_dsc_set_rc_buf_thresh(struct drm_dsc_config *vdsc_cfg) in drm_dsc_set_rc_buf_thresh() argument [all …]
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/drivers/gpu/drm/i915/display/ |
D | intel_vdsc.c | 56 intel_vdsc_set_min_max_qp(struct drm_dsc_config *vdsc_cfg, int buf, in intel_vdsc_set_min_max_qp() argument 59 int bpc = vdsc_cfg->bits_per_component; in intel_vdsc_set_min_max_qp() 62 vdsc_cfg->rc_range_params[buf].range_min_qp = in intel_vdsc_set_min_max_qp() 63 intel_lookup_range_min_qp(bpc, buf, bpp, vdsc_cfg->native_420); in intel_vdsc_set_min_max_qp() 64 vdsc_cfg->rc_range_params[buf].range_max_qp = in intel_vdsc_set_min_max_qp() 65 intel_lookup_range_max_qp(bpc, buf, bpp, vdsc_cfg->native_420); in intel_vdsc_set_min_max_qp() 78 calculate_rc_params(struct drm_dsc_config *vdsc_cfg) in calculate_rc_params() argument 80 int bpc = vdsc_cfg->bits_per_component; in calculate_rc_params() 81 int bpp = vdsc_cfg->bits_per_pixel >> 4; in calculate_rc_params() 85 if (vdsc_cfg->slice_height >= 8) in calculate_rc_params() [all …]
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D | icl_dsi.c | 1571 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in gen11_dsi_dsc_compute_config() local 1588 vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST; in gen11_dsi_dsc_compute_config() 1590 vdsc_cfg->pic_height = crtc_state->hw.adjusted_mode.crtc_vdisplay; in gen11_dsi_dsc_compute_config() 1597 drm_WARN_ON(&dev_priv->drm, vdsc_cfg->vbr_enable); in gen11_dsi_dsc_compute_config() 1598 drm_WARN_ON(&dev_priv->drm, vdsc_cfg->simple_422); in gen11_dsi_dsc_compute_config() 1600 vdsc_cfg->pic_width % vdsc_cfg->slice_width); in gen11_dsi_dsc_compute_config() 1601 drm_WARN_ON(&dev_priv->drm, vdsc_cfg->slice_height < 8); in gen11_dsi_dsc_compute_config() 1603 vdsc_cfg->pic_height % vdsc_cfg->slice_height); in gen11_dsi_dsc_compute_config() 1605 ret = drm_dsc_compute_rc_parameters(vdsc_cfg); in gen11_dsi_dsc_compute_config()
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D | intel_dp.c | 1587 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in intel_dp_dsc_compute_params() local 1597 vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST; in intel_dp_dsc_compute_params() 1598 vdsc_cfg->pic_height = crtc_state->hw.adjusted_mode.crtc_vdisplay; in intel_dp_dsc_compute_params() 1600 vdsc_cfg->slice_height = intel_dp_get_slice_height(vdsc_cfg->pic_height); in intel_dp_dsc_compute_params() 1606 vdsc_cfg->dsc_version_major = in intel_dp_dsc_compute_params() 1609 vdsc_cfg->dsc_version_minor = in intel_dp_dsc_compute_params() 1612 if (vdsc_cfg->convert_rgb) in intel_dp_dsc_compute_params() 1613 vdsc_cfg->convert_rgb = in intel_dp_dsc_compute_params() 1624 if (vdsc_cfg->dsc_version_minor == 2) in intel_dp_dsc_compute_params() 1625 vdsc_cfg->line_buf_depth = (line_buf_depth == DSC_1_2_MAX_LINEBUF_DEPTH_BITS) ? in intel_dp_dsc_compute_params() [all …]
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D | intel_bios.c | 3392 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in fill_dsc() local 3395 vdsc_cfg->dsc_version_major = dsc->version_major; in fill_dsc() 3396 vdsc_cfg->dsc_version_minor = dsc->version_minor; in fill_dsc() 3441 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size, in fill_dsc() 3445 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); in fill_dsc() 3447 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable; in fill_dsc() 3449 vdsc_cfg->slice_height = dsc->slice_height; in fill_dsc()
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D | intel_psr.c | 964 const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in psr2_granularity_check() local 996 vdsc_cfg->slice_height % y_granularity) in psr2_granularity_check() 1949 const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in intel_psr2_sel_fetch_pipe_alignment() local 1955 y_alignment = vdsc_cfg->slice_height; in intel_psr2_sel_fetch_pipe_alignment()
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