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/drivers/s390/char/
Draw3270.c48 struct raw3270_view *view; /* Active view. */ member
123 x = max_t(int, 0, rp->view->cols + x); in raw3270_buffer_address()
125 y = max_t(int, 0, rp->view->rows + y); in raw3270_buffer_address()
126 addr = (y * rp->view->cols) + x; in raw3270_buffer_address()
244 static int __raw3270_start(struct raw3270 *rp, struct raw3270_view *view, in __raw3270_start() argument
247 rq->view = view; in __raw3270_start()
248 raw3270_get_view(view); in __raw3270_start()
255 raw3270_put_view(view); in __raw3270_start()
263 int raw3270_view_active(struct raw3270_view *view) in raw3270_view_active() argument
265 struct raw3270 *rp = view->dev; in raw3270_view_active()
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Draw3270.h22 struct raw3270_view *view; /* view of this request */ member
56 void (*intv)(struct raw3270_view *view,
58 void (*release)(struct raw3270_view *view);
59 void (*free)(struct raw3270_view *view);
60 void (*resize)(struct raw3270_view *view,
86 int raw3270_add_view(struct raw3270_view *view, struct raw3270_fn *fn, int minor, int subclass);
87 int raw3270_view_lock_unavailable(struct raw3270_view *view);
88 int raw3270_activate_view(struct raw3270_view *view);
89 void raw3270_del_view(struct raw3270_view *view);
90 void raw3270_deactivate_view(struct raw3270_view *view);
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Dcon3270.c81 struct raw3270_view view; member
147 return tp->view.rows - TTY3270_INPUT_AREA_ROWS; in tty3270_tty_rows()
153 raw3270_buffer_address(tp->view.dev, cp, x, y); in tty3270_add_ba()
223 *cp++ = tp->view.ascebc['>']; in tty3270_add_prompt()
228 tp->view.cols * 2 - TTY3270_STATUS_AREA_SIZE - 2); in tty3270_add_prompt()
236 if (count < tp->view.cols * 2 - 11) in tty3270_add_prompt()
244 *d++ = tp->view.ascebc[(int)*s++]; in tty3270_ebcdic_convert()
275 codepage_convert(tp->view.ascebc, cp, len); in tty3270_add_status()
303 struct tty3270 *tp = container_of(rq->view, struct tty3270, view); in tty3270_write_callback()
347 if (line->len < tp->view.cols) in tty3270_required_length()
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Dfs3270.c34 struct raw3270_view view; member
62 static int fs3270_do_io(struct raw3270_view *view, struct raw3270_request *rq) in fs3270_do_io() argument
67 fp = (struct fs3270 *)view; in fs3270_do_io()
79 rc = raw3270_start(view, rq); in fs3270_do_io()
95 fp = (struct fs3270 *)rq->view; in fs3270_reset_callback()
104 fp = (struct fs3270 *)rq->view; in fs3270_restore_callback()
114 static int fs3270_activate(struct raw3270_view *view) in fs3270_activate() argument
120 fp = (struct fs3270 *)view; in fs3270_activate()
148 rc = raw3270_start_locked(view, fp->init); in fs3270_activate()
164 fp = (struct fs3270 *)rq->view; in fs3270_save_callback()
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/drivers/gpu/drm/vmwgfx/
Dvmwgfx_so.c131 struct vmw_view *view = vmw_view(res); in vmw_view_commit_notify() local
136 struct vmw_surface *srf = vmw_res_to_srf(view->srf); in vmw_view_commit_notify()
138 list_add_tail(&view->srf_head, &srf->view_list); in vmw_view_commit_notify()
139 vmw_cotable_add_resource(view->cotable, &view->cotable_head); in vmw_view_commit_notify()
140 view->committed = true; in vmw_view_commit_notify()
141 res->id = view->view_id; in vmw_view_commit_notify()
144 list_del_init(&view->cotable_head); in vmw_view_commit_notify()
145 list_del_init(&view->srf_head); in vmw_view_commit_notify()
146 view->committed = false; in vmw_view_commit_notify()
162 struct vmw_view *view = vmw_view(res); in vmw_view_create() local
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Dvmwgfx_execbuf.c368 struct vmw_resource *view) in vmw_view_res_val_add() argument
376 ret = vmw_execbuf_res_val_add(sw_context, vmw_view_srf(view), in vmw_view_res_val_add()
377 vmw_view_dirtying(view), vmw_val_add_flag_noctx); in vmw_view_res_val_add()
381 return vmw_execbuf_res_val_add(sw_context, view, VMW_RES_DIRTY_NONE, in vmw_view_res_val_add()
405 struct vmw_resource *view; in vmw_view_id_val_add() local
411 view = vmw_view_lookup(sw_context->man, view_type, id); in vmw_view_id_val_add()
412 if (IS_ERR(view)) in vmw_view_id_val_add()
413 return view; in vmw_view_id_val_add()
415 ret = vmw_view_res_val_add(sw_context, view); in vmw_view_id_val_add()
419 return view; in vmw_view_id_val_add()
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/drivers/usb/phy/
Dphy-ulpi-viewport.c22 static int ulpi_viewport_wait(void __iomem *view, u32 mask) in ulpi_viewport_wait() argument
26 return readl_poll_timeout_atomic(view, val, !(val & mask), 1, 2000); in ulpi_viewport_wait()
32 void __iomem *view = otg->io_priv; in ulpi_viewport_read() local
34 writel(ULPI_VIEW_WAKEUP | ULPI_VIEW_WRITE, view); in ulpi_viewport_read()
35 ret = ulpi_viewport_wait(view, ULPI_VIEW_WAKEUP); in ulpi_viewport_read()
39 writel(ULPI_VIEW_RUN | ULPI_VIEW_READ | ULPI_VIEW_ADDR(reg), view); in ulpi_viewport_read()
40 ret = ulpi_viewport_wait(view, ULPI_VIEW_RUN); in ulpi_viewport_read()
44 return ULPI_VIEW_DATA_READ(readl(view)); in ulpi_viewport_read()
50 void __iomem *view = otg->io_priv; in ulpi_viewport_write() local
52 writel(ULPI_VIEW_WAKEUP | ULPI_VIEW_WRITE, view); in ulpi_viewport_write()
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/drivers/gpu/drm/nouveau/dispnv50/
Dhead.c67 if (asyh->set.view ) head->func->view (head, asyh); in nv50_head_flush_set()
151 asyh->view.iW = umode->hdisplay; in nv50_head_atomic_check_view()
152 asyh->view.iH = umode_vdisplay; in nv50_head_atomic_check_view()
155 asyh->view.oW = omode_hdisplay; in nv50_head_atomic_check_view()
156 asyh->view.oH = omode_vdisplay; in nv50_head_atomic_check_view()
167 u32 r = (asyh->view.oH << 19) / asyh->view.oW; in nv50_head_atomic_check_view()
170 asyh->view.oW -= (bX * 2); in nv50_head_atomic_check_view()
171 if (bY) asyh->view.oH -= (bY * 2); in nv50_head_atomic_check_view()
172 else asyh->view.oH = ((asyh->view.oW * r) + (r / 2)) >> 19; in nv50_head_atomic_check_view()
174 asyh->view.oW -= (asyh->view.oW >> 4) + 32; in nv50_head_atomic_check_view()
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Dhead907d.c395 NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_IN, WIDTH, asyh->view.iW) | in head907d_view()
396 NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_IN, HEIGHT, asyh->view.iH)); in head907d_view()
399 NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_OUT, WIDTH, asyh->view.oW) | in head907d_view()
400 NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_OUT, HEIGHT, asyh->view.oH), in head907d_view()
403 NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_OUT_MIN, WIDTH, asyh->view.oW) | in head907d_view()
404 NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_OUT_MIN, HEIGHT, asyh->view.oH), in head907d_view()
407 NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_OUT_MAX, WIDTH, asyh->view.oW) | in head907d_view()
408 NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_OUT_MAX, HEIGHT, asyh->view.oH)); in head907d_view()
414 .view = head907d_view,
Dhead507d.c417 NVVAL(NV507D, HEAD_SET_VIEWPORT_SIZE_IN, WIDTH, asyh->view.iW) | in head507d_view()
418 NVVAL(NV507D, HEAD_SET_VIEWPORT_SIZE_IN, HEIGHT, asyh->view.iH)); in head507d_view()
421 NVVAL(NV507D, HEAD_SET_VIEWPORT_SIZE_OUT, WIDTH, asyh->view.oW) | in head507d_view()
422 NVVAL(NV507D, HEAD_SET_VIEWPORT_SIZE_OUT, HEIGHT, asyh->view.oH), in head507d_view()
425 NVVAL(NV507D, HEAD_SET_VIEWPORT_SIZE_OUT_MIN, WIDTH, asyh->view.oW) | in head507d_view()
426 NVVAL(NV507D, HEAD_SET_VIEWPORT_SIZE_OUT_MIN, HEIGHT, asyh->view.oH)); in head507d_view()
432 .view = head507d_view,
Dheadc37d.c265 NVVAL(NVC37D, HEAD_SET_VIEWPORT_SIZE_IN, WIDTH, asyh->view.iW) | in headc37d_view()
266 NVVAL(NVC37D, HEAD_SET_VIEWPORT_SIZE_IN, HEIGHT, asyh->view.iH)); in headc37d_view()
269 NVVAL(NVC37D, HEAD_SET_VIEWPORT_SIZE_OUT, WIDTH, asyh->view.oW) | in headc37d_view()
270 NVVAL(NVC37D, HEAD_SET_VIEWPORT_SIZE_OUT, HEIGHT, asyh->view.oH)); in headc37d_view()
285 .view = headc37d_view,
Datom.h33 } view; member
138 bool view:1; member
/drivers/gpu/drm/i915/selftests/
Di915_vma.c66 const struct i915_gtt_view *view) in checked_vma_instance() argument
71 vma = i915_vma_instance(obj, vm, view); in checked_vma_instance()
88 if (i915_vma_compare(vma, vm, view)) { in checked_vma_instance()
591 struct i915_gtt_view view = { in igt_vma_rotate_remap() local
596 struct intel_remapped_plane_info *plane_info = view.remapped.plane; in igt_vma_rotate_remap()
605 plane_info[0].dst_stride = view.type == I915_GTT_VIEW_ROTATED ? in igt_vma_rotate_remap()
609 plane_info[1].dst_stride = view.type == I915_GTT_VIEW_ROTATED ? in igt_vma_rotate_remap()
619 vma = checked_vma_instance(obj, vm, &view); in igt_vma_rotate_remap()
631 expected_pages = remapped_size(view.type, &plane_info[0], &plane_info[1]); in igt_vma_rotate_remap()
633 if (view.type == I915_GTT_VIEW_ROTATED && in igt_vma_rotate_remap()
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/drivers/gpu/drm/i915/
Di915_vma.h46 const struct i915_gtt_view *view);
210 const struct i915_gtt_view *view) in i915_vma_compare() argument
214 GEM_BUG_ON(view && !i915_is_ggtt_or_dpt(vm)); in i915_vma_compare()
222 if (!view) in i915_vma_compare()
225 cmp -= view->type; in i915_vma_compare()
244 BUILD_BUG_ON(offsetof(typeof(*view), rotated) != in i915_vma_compare()
245 offsetof(typeof(*view), partial)); in i915_vma_compare()
246 BUILD_BUG_ON(offsetof(typeof(*view), rotated) != in i915_vma_compare()
247 offsetof(typeof(*view), remapped)); in i915_vma_compare()
248 return memcmp(&vma->gtt_view.partial, &view->partial, view->type); in i915_vma_compare()
Di915_vma.c139 const struct i915_gtt_view *view) in vma_create() argument
171 if (view && view->type != I915_GTT_VIEW_NORMAL) { in vma_create()
172 vma->gtt_view = *view; in vma_create()
173 if (view->type == I915_GTT_VIEW_PARTIAL) { in vma_create()
175 view->partial.offset, in vma_create()
176 view->partial.size, in vma_create()
178 vma->size = view->partial.size; in vma_create()
181 } else if (view->type == I915_GTT_VIEW_ROTATED) { in vma_create()
182 vma->size = intel_rotation_info_size(&view->rotated); in vma_create()
184 } else if (view->type == I915_GTT_VIEW_REMAPPED) { in vma_create()
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Di915_gem.h58 const struct i915_gtt_view *view,
63 const struct i915_gtt_view *view,
/drivers/gpu/drm/i915/display/
Dintel_fb_pin.c21 const struct i915_gtt_view *view, in intel_pin_fb_obj_dpt() argument
73 vma = i915_vma_instance(obj, vm, view); in intel_pin_fb_obj_dpt()
108 const struct i915_gtt_view *view, in intel_pin_and_fence_fb_obj() argument
176 view, pinctl); in intel_pin_and_fence_fb_obj()
250 &plane_state->view.gtt, in intel_plane_pin_fb()
276 vma = intel_pin_fb_obj_dpt(fb, &plane_state->view.gtt, false, in intel_plane_pin_fb()
Dskl_universal_plane.c610 u32 stride = plane_state->view.color_plane[color_plane].scanout_stride; in skl_plane_stride()
1002 u32 offset = plane_state->view.color_plane[color_plane].offset; in skl_surf_address()
1151 u32 x = plane_state->view.color_plane[0].x; in skl_plane_update_arm()
1152 u32 y = plane_state->view.color_plane[0].y; in skl_plane_update_arm()
1173 PLANE_OFFSET_Y(plane_state->view.color_plane[1].y) | in skl_plane_update_arm()
1174 PLANE_OFFSET_X(plane_state->view.color_plane[1].x)); in skl_plane_update_arm()
1212 int x = plane_state->view.color_plane[color_plane].x; in icl_plane_update_noarm()
1213 int y = plane_state->view.color_plane[color_plane].y; in icl_plane_update_noarm()
1531 int aux_x = plane_state->view.color_plane[ccs_plane].x; in skl_check_main_ccs_coordinates()
1532 int aux_y = plane_state->view.color_plane[ccs_plane].y; in skl_check_main_ccs_coordinates()
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Dintel_fb.c998 state->view.color_plane[color_plane].mapping_stride, in intel_plane_adjust_aligned_offset()
1079 int pitch = state->view.color_plane[color_plane].mapping_stride; in intel_plane_compute_aligned_offset()
1426 struct intel_fb_view *view) in calc_plane_remap_info() argument
1429 struct intel_remapped_plane_info *remap_info = &view->gtt.remapped.plane[color_plane]; in calc_plane_remap_info()
1430 struct i915_color_plane_view *color_plane_info = &view->color_plane[color_plane]; in calc_plane_remap_info()
1455 if (view->gtt.type == I915_GTT_VIEW_ROTATED) { in calc_plane_remap_info()
1457 check_array_bounds(i915, view->gtt.rotated.plane, color_plane); in calc_plane_remap_info()
1480 drm_WARN_ON(&i915->drm, view->gtt.type != I915_GTT_VIEW_REMAPPED); in calc_plane_remap_info()
1482 check_array_bounds(i915, view->gtt.remapped.plane, color_plane); in calc_plane_remap_info()
1484 if (view->gtt.remapped.plane_alignment) { in calc_plane_remap_info()
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Di9xx_plane.c271 while ((src_x + src_w) * cpp > plane_state->view.color_plane[0].mapping_stride) { in i9xx_check_plane_surface()
311 plane_state->view.color_plane[0].offset = offset; in i9xx_check_plane_surface()
312 plane_state->view.color_plane[0].x = src_x; in i9xx_check_plane_surface()
313 plane_state->view.color_plane[0].y = src_y; in i9xx_check_plane_surface()
425 plane_state->view.color_plane[0].mapping_stride); in i9xx_plane_update_noarm()
451 int x = plane_state->view.color_plane[0].x; in i9xx_plane_update_arm()
452 int y = plane_state->view.color_plane[0].y; in i9xx_plane_update_arm()
460 dspaddr_offset = plane_state->view.color_plane[0].offset; in i9xx_plane_update_arm()
551 u32 dspaddr_offset = plane_state->view.color_plane[0].offset; in g4x_primary_async_flip()
570 u32 dspaddr_offset = plane_state->view.color_plane[0].offset; in vlv_primary_async_flip()
Dintel_sprite.c373 plane_state->view.color_plane[0].mapping_stride); in vlv_sprite_update_noarm()
389 u32 sprsurf_offset = plane_state->view.color_plane[0].offset; in vlv_sprite_update_arm()
390 u32 x = plane_state->view.color_plane[0].x; in vlv_sprite_update_arm()
391 u32 y = plane_state->view.color_plane[0].y; in vlv_sprite_update_arm()
795 plane_state->view.color_plane[0].mapping_stride); in ivb_sprite_update_noarm()
812 u32 sprsurf_offset = plane_state->view.color_plane[0].offset; in ivb_sprite_update_arm()
813 u32 x = plane_state->view.color_plane[0].x; in ivb_sprite_update_arm()
814 u32 y = plane_state->view.color_plane[0].y; in ivb_sprite_update_arm()
1122 plane_state->view.color_plane[0].mapping_stride); in g4x_sprite_update_noarm()
1138 u32 dvssurf_offset = plane_state->view.color_plane[0].offset; in g4x_sprite_update_arm()
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Dintel_cursor.c44 return base + plane_state->view.color_plane[0].offset; in intel_cursor_base()
124 plane_state->view.color_plane[0].offset = offset; in intel_cursor_check_surface()
125 plane_state->view.color_plane[0].x = src_x; in intel_cursor_check_surface()
126 plane_state->view.color_plane[0].y = src_y; in intel_cursor_check_surface()
198 CURSOR_STRIDE(plane_state->view.color_plane[0].mapping_stride); in i845_cursor_ctl()
237 plane_state->view.color_plane[0].mapping_stride != fb->pitches[0]); in i845_check_cursor()
454 plane_state->view.color_plane[0].mapping_stride != fb->pitches[0]); in i9xx_check_cursor()
/drivers/gpu/drm/i915/gem/
Di915_gem_mman.c202 struct i915_gtt_view view; in compute_partial_view() local
207 view.type = I915_GTT_VIEW_PARTIAL; in compute_partial_view()
208 view.partial.offset = rounddown(page_offset, chunk); in compute_partial_view()
209 view.partial.size = in compute_partial_view()
211 (obj->base.size >> PAGE_SHIFT) - view.partial.offset); in compute_partial_view()
215 view.type = I915_GTT_VIEW_NORMAL; in compute_partial_view()
217 return view; in compute_partial_view()
384 struct i915_gtt_view view = in vm_fault_gtt() local
389 if (view.type == I915_GTT_VIEW_NORMAL) in vm_fault_gtt()
397 vma = i915_gem_object_ggtt_pin_ww(obj, &ww, &view, 0, 0, flags); in vm_fault_gtt()
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Di915_gem_domain.c428 const struct i915_gtt_view *view, in i915_gem_object_pin_to_display_plane() argument
476 (!view || view->type == I915_GTT_VIEW_NORMAL)) in i915_gem_object_pin_to_display_plane()
477 vma = i915_gem_object_ggtt_pin_ww(obj, ww, view, 0, alignment, in i915_gem_object_pin_to_display_plane()
481 vma = i915_gem_object_ggtt_pin_ww(obj, ww, view, 0, in i915_gem_object_pin_to_display_plane()
/drivers/gpu/drm/i915/gem/selftests/
Di915_gem_mman.c98 struct i915_gtt_view view; in check_partial_mapping() local
127 view = compute_partial_view(obj, page, MIN_CHUNK_PAGES); in check_partial_mapping()
129 vma = i915_gem_object_ggtt_pin(obj, &view, 0, 0, PIN_MAPPABLE); in check_partial_mapping()
136 n = page - view.partial.offset; in check_partial_mapping()
137 GEM_BUG_ON(n >= view.partial.size); in check_partial_mapping()
163 view.partial.offset, in check_partial_mapping()
164 view.partial.size, in check_partial_mapping()
215 struct i915_gtt_view view = in check_partial_mappings() local
223 GEM_BUG_ON(view.partial.size > nreal); in check_partial_mappings()
226 vma = i915_gem_object_ggtt_pin(obj, &view, 0, 0, PIN_MAPPABLE); in check_partial_mappings()
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