Home
last modified time | relevance | path

Searched refs:vmw_write (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/vmwgfx/
Dvmwgfx_drv.c446 vmw_write(dev_priv, SVGA_REG_ENABLE, SVGA_REG_ENABLE_ENABLE | in vmw_device_init()
452 vmw_write(dev_priv, SVGA_REG_TRACES, uses_fb_traces); in vmw_device_init()
459 vmw_write(dev_priv, SVGA_REG_CONFIG_DONE, 1); in vmw_device_init()
472 vmw_write(vmw, SVGA_REG_SYNC, SVGA_SYNC_GENERIC); in vmw_device_fini()
478 vmw_write(vmw, SVGA_REG_CONFIG_DONE, in vmw_device_fini()
480 vmw_write(vmw, SVGA_REG_ENABLE, in vmw_device_fini()
482 vmw_write(vmw, SVGA_REG_TRACES, in vmw_device_fini()
801 vmw_write(dev, SVGA_REG_ID, vmw_is_svga_v3(dev) ? in vmw_detect_version()
819 vmw_write(dev, SVGA_REG_GUEST_DRIVER_ID, in vmw_write_driver_id()
822 vmw_write(dev, SVGA_REG_GUEST_DRIVER_VERSION1, in vmw_write_driver_id()
[all …]
Dvmwgfx_ldu.c115 vmw_write(dev_priv, SVGA_REG_NUM_GUEST_DISPLAYS, in vmw_ldu_commit_list()
122 vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, i); in vmw_ldu_commit_list()
123 vmw_write(dev_priv, SVGA_REG_DISPLAY_IS_PRIMARY, !i); in vmw_ldu_commit_list()
124 vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_X, crtc->x); in vmw_ldu_commit_list()
125 vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_Y, crtc->y); in vmw_ldu_commit_list()
126 vmw_write(dev_priv, SVGA_REG_DISPLAY_WIDTH, crtc->mode.hdisplay); in vmw_ldu_commit_list()
127 vmw_write(dev_priv, SVGA_REG_DISPLAY_HEIGHT, crtc->mode.vdisplay); in vmw_ldu_commit_list()
Dvmwgfx_irq.c249 vmw_write(dev_priv, SVGA_REG_IRQMASK, dev_priv->irq_mask); in vmw_generic_waiter_add()
260 vmw_write(dev_priv, SVGA_REG_IRQMASK, dev_priv->irq_mask); in vmw_generic_waiter_remove()
308 vmw_write(dev_priv, SVGA_REG_IRQMASK, 0); in vmw_irq_uninstall()
Dvmwgfx_kms.c172 vmw_write(dev_priv, SVGA_REG_CURSOR_MOBID, in vmw_cursor_update_mob()
344 vmw_write(dev_priv, SVGA_REG_CURSOR4_X, x); in vmw_cursor_update_position()
345 vmw_write(dev_priv, SVGA_REG_CURSOR4_Y, y); in vmw_cursor_update_position()
346 vmw_write(dev_priv, SVGA_REG_CURSOR4_SCREEN_ID, SVGA3D_INVALID_ID); in vmw_cursor_update_position()
347 vmw_write(dev_priv, SVGA_REG_CURSOR4_ON, svga_cursor_on); in vmw_cursor_update_position()
348 vmw_write(dev_priv, SVGA_REG_CURSOR4_SUBMIT, 1); in vmw_cursor_update_position()
356 vmw_write(dev_priv, SVGA_REG_CURSOR_X, x); in vmw_cursor_update_position()
357 vmw_write(dev_priv, SVGA_REG_CURSOR_Y, y); in vmw_cursor_update_position()
358 vmw_write(dev_priv, SVGA_REG_CURSOR_ON, svga_cursor_on); in vmw_cursor_update_position()
2137 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch); in vmw_kms_write_svga()
[all …]
Dvmwgfx_devcaps.c95 vmw_write(vmw, SVGA_REG_DEV_CAP, i); in vmw_devcaps_create()
Dvmwgfx_cmd.c137 vmw_write(dev_priv, SVGA_REG_CONFIG_DONE, 1); in vmw_fifo_create()
162 vmw_write(dev_priv, SVGA_REG_SYNC, reason); in vmw_fifo_ping_host()
Dvmwgfx_cmdbuf.c307 vmw_write(man->dev_priv, SVGA_REG_COMMAND_HIGH, val); in vmw_cmdbuf_header_submit()
311 vmw_write(man->dev_priv, SVGA_REG_COMMAND_LOW, val); in vmw_cmdbuf_header_submit()
Dvmwgfx_drv.h693 static inline void vmw_write(struct vmw_private *dev_priv, in vmw_write() function
1507 vmw_write(vmw, SVGA_REG_IRQ_STATUS, status); in vmw_irq_status_write()
Dvmwgfx_fence.c95 vmw_write(vmw, SVGA_REG_FENCE_GOAL, value); in vmw_fence_goal_write()