/drivers/scsi/qla2xxx/ |
D | qla_dbg.c | 138 wrt_reg_dword(®->hccr, HCCRX_SET_HOST_INT); in qla27xx_dump_mpi_ram() 157 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT); in qla27xx_dump_mpi_ram() 164 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT); in qla27xx_dump_mpi_ram() 224 wrt_reg_dword(®->hccr, HCCRX_SET_HOST_INT); in qla24xx_dump_ram() 240 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT); in qla24xx_dump_ram() 247 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT); in qla24xx_dump_ram() 301 wrt_reg_dword(®->iobase_addr, iobase); in qla24xx_read_window() 312 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_PAUSE); in qla24xx_pause_risc() 333 wrt_reg_dword(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); in qla24xx_soft_reset() 343 wrt_reg_dword(®->ctrl_status, in qla24xx_soft_reset() [all …]
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D | qla_mr.h | 365 wrt_reg_dword((ha)->cregbase + QLAFX00_HST_TO_HBA_REG, \ 369 wrt_reg_dword((ha)->cregbase + QLAFX00_HBA_TO_HOST_REG, \ 376 wrt_reg_dword((ha)->cregbase + QLAFX00_HBA_TO_HOST_REG, \ 380 wrt_reg_dword((ha)->cregbase + off, val) 386 wrt_reg_dword((ha)->cregbase + QLAFX00_HST_RST_REG, val) 392 wrt_reg_dword((ha)->cregbase + QLAFX00_HBA_ICNTRL_REG, \ 397 wrt_reg_dword((ha)->cregbase + QLAFX00_HBA_ICNTRL_REG, \ 405 wrt_reg_dword((ha)->cregbase + off, val)
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D | qla_sup.c | 458 wrt_reg_dword(®->flash_addr, addr & ~FARX_DATA_FLAG); in qla24xx_read_flash_dword() 501 wrt_reg_dword(®->flash_data, data); in qla24xx_write_flash_dword() 502 wrt_reg_dword(®->flash_addr, addr | FARX_DATA_FLAG); in qla24xx_write_flash_dword() 1217 wrt_reg_dword(®->ctrl_status, in qla24xx_unprotect_flash() 1260 wrt_reg_dword(®->ctrl_status, in qla24xx_protect_flash() 1486 wrt_reg_dword(®->ctrl_status, in qla24xx_write_nvram_data() 1510 wrt_reg_dword(®->ctrl_status, in qla24xx_write_nvram_data() 1756 wrt_reg_dword(®->gpiod, gpio_data); in qla24xx_beacon_blink() 1769 wrt_reg_dword(®->gpiod, gpio_data); in qla24xx_beacon_blink() 1905 wrt_reg_dword(®->gpiod, gpio_data); in qla24xx_beacon_on() [all …]
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D | qla_nx.c | 895 wrt_reg_dword(CRB_WINDOW_2M + ha->nx_pcibase, off & 0xFFFF0000); in qla82xx_md_rw_32() 902 wrt_reg_dword(off_value + CRB_INDIRECT_2M + ha->nx_pcibase, in qla82xx_md_rw_32() 1746 wrt_reg_dword(®->req_q_out[0], 0); in qla82xx_config_rings() 1747 wrt_reg_dword(®->rsp_q_in[0], 0); in qla82xx_config_rings() 1748 wrt_reg_dword(®->rsp_q_out[0], 0); in qla82xx_config_rings() 2053 wrt_reg_dword(®->host_int, 0); in qla82xx_intr_handler() 2122 wrt_reg_dword(®->host_int, 0); in qla82xx_msix_default() 2156 wrt_reg_dword(®->host_int, 0); in qla82xx_msix_rsp_q() 2214 wrt_reg_dword(®->host_int, 0); in qla82xx_poll() 2772 wrt_reg_dword(ha->nxdb_wr_ptr, dbval); in qla82xx_start_iocbs() [all …]
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D | qla_mr.c | 119 wrt_reg_dword(optr, *iptr); in qlafx00_mailbox_command() 678 wrt_reg_dword(®->req_q_in, 0); in qlafx00_config_rings() 679 wrt_reg_dword(®->req_q_out, 0); in qlafx00_config_rings() 681 wrt_reg_dword(®->rsp_q_in, 0); in qlafx00_config_rings() 682 wrt_reg_dword(®->rsp_q_out, 0); in qlafx00_config_rings() 930 wrt_reg_dword(®->aenmailbox0, 0); in qlafx00_init_fw_ready() 1407 wrt_reg_dword((void __force __iomem *)&pkt->signature, in qlafx00_init_response_q_entries() 2760 wrt_reg_dword(rsp->rsp_q_out, rsp->ring_index); in qlafx00_process_response_queue() 3155 wrt_reg_dword(req->req_q_in, req->ring_index); in qlafx00_start_scsi()
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D | qla_isr.c | 4162 wrt_reg_dword(®->rsp_q_out[0], rsp->ring_index); in qla24xx_process_response_queue() 4164 wrt_reg_dword(rsp->rsp_q_out, rsp->ring_index); in qla24xx_process_response_queue() 4181 wrt_reg_dword(®->iobase_addr, 0x7C00); in qla2xxx_check_risc_status() 4183 wrt_reg_dword(®->iobase_window, 0x0001); in qla2xxx_check_risc_status() 4187 wrt_reg_dword(®->iobase_window, 0x0001); in qla2xxx_check_risc_status() 4196 wrt_reg_dword(®->iobase_window, 0x0003); in qla2xxx_check_risc_status() 4200 wrt_reg_dword(®->iobase_window, 0x0003); in qla2xxx_check_risc_status() 4214 wrt_reg_dword(®->iobase_window, 0x0000); in qla2xxx_check_risc_status() 4313 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT); in qla24xx_intr_handler() 4353 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT); in qla24xx_msix_rsp_q() [all …]
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D | qla_iocb.c | 477 wrt_reg_dword(req->req_q_in, req->ring_index); in qla2x00_start_iocbs() 479 wrt_reg_dword(req->req_q_in, req->ring_index); in qla2x00_start_iocbs() 482 wrt_reg_dword(®->ispfx00.req_q_in, req->ring_index); in qla2x00_start_iocbs() 486 wrt_reg_dword(®->isp24.req_q_in, req->ring_index); in qla2x00_start_iocbs() 1668 wrt_reg_dword(req->req_q_in, req->ring_index); in qla24xx_start_scsi() 1872 wrt_reg_dword(req->req_q_in, req->ring_index); in qla24xx_dif_start_scsi() 2035 wrt_reg_dword(req->req_q_in, req->ring_index); in qla2xxx_start_scsi_mq() 2253 wrt_reg_dword(req->req_q_in, req->ring_index); in qla2xxx_dif_start_scsi_mq() 2352 wrt_reg_dword((__le32 __force __iomem *)&pkt->handle, handle); in __qla2x00_alloc_iocbs() 3657 wrt_reg_dword(ha->nxdb_wr_ptr, dbval); in qla82xx_start_scsi() [all …]
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D | qla_init.c | 3336 wrt_reg_dword(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); in qla24xx_reset_risc() 3353 wrt_reg_dword(®->ctrl_status, in qla24xx_reset_risc() 3413 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET); in qla24xx_reset_risc() 3416 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE); in qla24xx_reset_risc() 3419 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_RESET); in qla24xx_reset_risc() 3465 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); in qla25xx_read_risc_sema_reg() 3474 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); in qla25xx_write_risc_sema_reg() 3475 wrt_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data); in qla25xx_write_risc_sema_reg() 3491 wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); in qla25xx_manipulate_risc_semaphore() 4727 wrt_reg_dword(®->isp25mq.req_q_in, 0); in qla24xx_config_rings() [all …]
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D | qla_inline.h | 369 wrt_reg_dword(req->req_q_in, req->ring_index); in qla_83xx_start_iocbs()
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D | qla_mbx.c | 268 wrt_reg_dword(®->isp82.hint, HINT_MBX_INT_PENDING); in qla2x00_mailbox_command() 270 wrt_reg_dword(®->isp24.hccr, HCCRX_SET_HOST_INT); in qla2x00_mailbox_command() 327 wrt_reg_dword(®->isp82.hint, HINT_MBX_INT_PENDING); in qla2x00_mailbox_command() 329 wrt_reg_dword(®->isp24.hccr, HCCRX_SET_HOST_INT); in qla2x00_mailbox_command() 4553 wrt_reg_dword(req->req_q_in, 0); in qla25xx_init_req_que() 4555 wrt_reg_dword(req->req_q_out, 0); in qla25xx_init_req_que() 4624 wrt_reg_dword(rsp->rsp_q_out, 0); in qla25xx_init_rsp_que() 4626 wrt_reg_dword(rsp->rsp_q_in, 0); in qla25xx_init_rsp_que() 5524 wrt_reg_dword(®->hccr, HCCRX_SET_HOST_INT); in qla81xx_write_mpi_register() 5538 wrt_reg_dword(®->hccr, in qla81xx_write_mpi_register()
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D | qla_tmpl.c | 101 wrt_reg_dword(window, data); in qla27xx_write_reg()
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D | qla_nvme.c | 748 wrt_reg_dword(req->req_q_in, req->ring_index); in qla2x00_start_nvme_mq()
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D | qla_target.c | 6848 wrt_reg_dword(ISP_ATIO_Q_OUT(vha), ha->tgt.atio_ring_index); in qlt_24xx_process_atio_queue() 6861 wrt_reg_dword(ISP_ATIO_Q_IN(vha), 0); in qlt_24xx_config_rings() 6862 wrt_reg_dword(ISP_ATIO_Q_OUT(vha), 0); in qlt_24xx_config_rings()
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D | qla_nx2.c | 3967 wrt_reg_dword(®->host_int, 0); in qla8044_intr_handler()
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D | qla_os.c | 2033 wrt_reg_dword(®->ictrl, ICRX_EN_RISC_INT); in qla24xx_enable_intrs() 2048 wrt_reg_dword(®->ictrl, 0); in qla24xx_disable_intrs()
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D | qla_edif.c | 3206 wrt_reg_dword(req->req_q_in, req->ring_index); in qla28xx_start_scsi_edif()
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D | qla_def.h | 198 static inline void wrt_reg_dword(volatile __le32 __iomem *addr, u32 data) in wrt_reg_dword() function
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