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Searched refs:znum (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dgp100.c36 const int znum = zbc - 1; in gp100_gr_zbc_clear_color() local
37 const u32 zoff = znum * 4; in gp100_gr_zbc_clear_color()
46 nvkm_mask(device, 0x418100 + ((znum / 4) * 4), in gp100_gr_zbc_clear_color()
47 0x0000007f << ((znum % 4) * 7), in gp100_gr_zbc_clear_color()
48 gr->zbc_color[zbc].format << ((znum % 4) * 7)); in gp100_gr_zbc_clear_color()
55 const int znum = zbc - 1; in gp100_gr_zbc_clear_depth() local
56 const u32 zoff = znum * 4; in gp100_gr_zbc_clear_depth()
60 nvkm_mask(device, 0x41814c + ((znum / 4) * 4), in gp100_gr_zbc_clear_depth()
61 0x0000007f << ((znum % 4) * 7), in gp100_gr_zbc_clear_depth()
62 gr->zbc_depth[zbc].format << ((znum % 4) * 7)); in gp100_gr_zbc_clear_depth()
Dgp102.c33 const int znum = zbc - 1; in gp102_gr_zbc_clear_stencil() local
34 const u32 zoff = znum * 4; in gp102_gr_zbc_clear_stencil()
38 nvkm_mask(device, 0x418198 + ((znum / 4) * 4), in gp102_gr_zbc_clear_stencil()
39 0x0000007f << ((znum % 4) * 7), in gp102_gr_zbc_clear_stencil()
40 gr->zbc_stencil[zbc].format << ((znum % 4) * 7)); in gp102_gr_zbc_clear_stencil()
/drivers/dma/ppc4xx/
Dadma.c3155 int znum = 0; in ppc440spe_adma_pq_set_src() local
3161 znum++; in ppc440spe_adma_pq_set_src()
3163 znum++; in ppc440spe_adma_pq_set_src()
3167 index + znum); in ppc440spe_adma_pq_set_src()
3483 int znum = 0; in ppc440spe_adma_pq_set_src_mult() local
3490 znum++; in ppc440spe_adma_pq_set_src_mult()
3492 znum++; in ppc440spe_adma_pq_set_src_mult()
3494 iter = ppc440spe_get_group_entry(sw_desc, index + znum); in ppc440spe_adma_pq_set_src_mult()