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Searched defs:mask (Results 1 – 25 of 3518) sorted by relevance

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/drivers/video/fbdev/riva/
Dnvreg.h31 #define MASKEXPAND(mask) BITMASK(1?mask,0?mask) argument
34 #define SetBF(mask,value) ((value) << (0?mask)) argument
35 #define GetBF(var,mask) (((unsigned)((var) & MASKEXPAND(mask))) >> (0?mask) ) argument
37 #define MaskAndSetBF(var,mask,value) (var)=(((var)&(~MASKEXPAND(mask)) \ argument
51 #define DEVICE_DEF(device,mask,value) \ argument
53 #define DEVICE_VALUE(device,mask,value) SetBF(NV_##device##_##mask,value) argument
54 #define DEVICE_MASK(device,mask) MASKEXPAND(NV_##device##_##mask) argument
59 #define PDAC_Def(mask,value) DEVICE_DEF(PDAC,mask,value) argument
60 #define PDAC_Val(mask,value) DEVICE_VALUE(PDAC,mask,value) argument
61 #define PDAC_Mask(mask) DEVICE_MASK(PDAC,mask) argument
[all …]
/drivers/net/ethernet/chelsio/cxgb4/
Dcxgb4_tc_u32_parse.h46 __be32 val, __be32 mask) in cxgb4_fill_ipv4_tos()
55 __be32 val, __be32 mask) in cxgb4_fill_ipv4_frag()
77 __be32 val, __be32 mask) in cxgb4_fill_ipv4_proto()
86 __be32 val, __be32 mask) in cxgb4_fill_ipv4_src_ip()
95 __be32 val, __be32 mask) in cxgb4_fill_ipv4_dst_ip()
114 __be32 val, __be32 mask) in cxgb4_fill_ipv6_tos()
123 __be32 val, __be32 mask) in cxgb4_fill_ipv6_proto()
132 __be32 val, __be32 mask) in cxgb4_fill_ipv6_src_ip0()
141 __be32 val, __be32 mask) in cxgb4_fill_ipv6_src_ip1()
150 __be32 val, __be32 mask) in cxgb4_fill_ipv6_src_ip2()
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/drivers/net/ethernet/mellanox/mlx5/core/steering/
Ddr_ste.c11 u8 mask[DR_STE_SIZE_MASK]; member
715 struct mlx5dr_match_param *mask, in mlx5dr_ste_build_pre_check()
806 static void dr_ste_copy_mask_misc(char *mask, struct mlx5dr_match_misc *spec, bool clr) in dr_ste_copy_mask_misc()
858 static void dr_ste_copy_mask_spec(char *mask, struct mlx5dr_match_spec *spec, bool clr) in dr_ste_copy_mask_spec()
910 static void dr_ste_copy_mask_misc2(char *mask, struct mlx5dr_match_misc2 *spec, bool clr) in dr_ste_copy_mask_misc2()
955 static void dr_ste_copy_mask_misc3(char *mask, struct mlx5dr_match_misc3 *spec, bool clr) in dr_ste_copy_mask_misc3()
985 static void dr_ste_copy_mask_misc4(char *mask, struct mlx5dr_match_misc4 *spec, bool clr) in dr_ste_copy_mask_misc4()
1005 static void dr_ste_copy_mask_misc5(char *mask, struct mlx5dr_match_misc5 *spec, bool clr) in dr_ste_copy_mask_misc5()
1027 struct mlx5dr_match_parameters *mask, in mlx5dr_ste_copy_param()
1129 struct mlx5dr_match_param *mask, in mlx5dr_ste_build_eth_l2_src_dst()
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Ddr_ste_v0.c707 struct mlx5dr_match_spec *mask = inner ? &value->inner : &value->outer; in dr_ste_v0_build_eth_l2_src_dst_bit_mask() local
782 struct mlx5dr_match_param *mask) in dr_ste_v0_build_eth_l2_src_dst_init()
808 struct mlx5dr_match_param *mask) in dr_ste_v0_build_eth_l3_ipv6_dst_init()
834 struct mlx5dr_match_param *mask) in dr_ste_v0_build_eth_l3_ipv6_src_init()
871 struct mlx5dr_match_param *mask) in dr_ste_v0_build_eth_l3_ipv4_5_tuple_init()
884 struct mlx5dr_match_spec *mask = inner ? &value->inner : &value->outer; in dr_ste_v0_build_eth_l2_src_or_dst_bit_mask() local
996 struct mlx5dr_match_spec *mask = inner ? &value->inner : &value->outer; in dr_ste_v0_build_eth_l2_src_bit_mask() local
1019 struct mlx5dr_match_param *mask) in dr_ste_v0_build_eth_l2_src_init()
1032 struct mlx5dr_match_spec *mask = sb->inner ? &value->inner : &value->outer; in dr_ste_v0_build_eth_l2_dst_bit_mask() local
1055 struct mlx5dr_match_param *mask) in dr_ste_v0_build_eth_l2_dst_init()
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Ddr_matcher.c116 dr_mask_is_tnl_vxlan_gpe(struct mlx5dr_match_param *mask, in dr_mask_is_tnl_vxlan_gpe()
157 dr_mask_is_tnl_geneve(struct mlx5dr_match_param *mask, in dr_mask_is_tnl_geneve()
174 static bool dr_mask_is_tnl_gtpu(struct mlx5dr_match_param *mask, in dr_mask_is_tnl_gtpu()
186 static bool dr_mask_is_tnl_gtpu_dw_0(struct mlx5dr_match_param *mask, in dr_mask_is_tnl_gtpu_dw_0()
198 static bool dr_mask_is_tnl_gtpu_teid(struct mlx5dr_match_param *mask, in dr_mask_is_tnl_gtpu_teid()
210 static bool dr_mask_is_tnl_gtpu_dw_2(struct mlx5dr_match_param *mask, in dr_mask_is_tnl_gtpu_dw_2()
222 static bool dr_mask_is_tnl_gtpu_first_ext(struct mlx5dr_match_param *mask, in dr_mask_is_tnl_gtpu_first_ext()
229 static bool dr_mask_is_tnl_gtpu_flex_parser_0(struct mlx5dr_match_param *mask, in dr_mask_is_tnl_gtpu_flex_parser_0()
244 static bool dr_mask_is_tnl_gtpu_flex_parser_1(struct mlx5dr_match_param *mask, in dr_mask_is_tnl_gtpu_flex_parser_1()
259 static bool dr_mask_is_tnl_gtpu_any(struct mlx5dr_match_param *mask, in dr_mask_is_tnl_gtpu_any()
[all …]
Ddr_ste_v1.c354 u8 *mask = tag + DR_STE_SIZE_TAG; in dr_ste_v1_prepare_for_postsend() local
1104 struct mlx5dr_match_spec *mask = inner ? &value->inner : &value->outer; in dr_ste_v1_build_eth_l2_src_dst_bit_mask() local
1163 struct mlx5dr_match_param *mask) in dr_ste_v1_build_eth_l2_src_dst_init()
1187 struct mlx5dr_match_param *mask) in dr_ste_v1_build_eth_l3_ipv6_dst_init()
1211 struct mlx5dr_match_param *mask) in dr_ste_v1_build_eth_l3_ipv6_src_init()
1246 struct mlx5dr_match_param *mask) in dr_ste_v1_build_eth_l3_ipv4_5_tuple_init()
1258 struct mlx5dr_match_spec *mask = inner ? &value->inner : &value->outer; in dr_ste_v1_build_eth_l2_src_or_dst_bit_mask() local
1366 struct mlx5dr_match_spec *mask = inner ? &value->inner : &value->outer; in dr_ste_v1_build_eth_l2_src_bit_mask() local
1387 struct mlx5dr_match_param *mask) in dr_ste_v1_build_eth_l2_src_init()
1399 struct mlx5dr_match_spec *mask = inner ? &value->inner : &value->outer; in dr_ste_v1_build_eth_l2_dst_bit_mask() local
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/drivers/bcma/
Ddriver_chipcommon.c19 u32 mask, u32 value) in bcma_cc_write32_masked()
264 void bcma_chipco_irq_mask(struct bcma_drv_cc *cc, u32 mask, u32 value) in bcma_chipco_irq_mask()
269 u32 bcma_chipco_irq_status(struct bcma_drv_cc *cc, u32 mask) in bcma_chipco_irq_status()
274 u32 bcma_chipco_gpio_in(struct bcma_drv_cc *cc, u32 mask) in bcma_chipco_gpio_in()
279 u32 bcma_chipco_gpio_out(struct bcma_drv_cc *cc, u32 mask, u32 value) in bcma_chipco_gpio_out()
292 u32 bcma_chipco_gpio_outen(struct bcma_drv_cc *cc, u32 mask, u32 value) in bcma_chipco_gpio_outen()
309 u32 bcma_chipco_gpio_control(struct bcma_drv_cc *cc, u32 mask, u32 value) in bcma_chipco_gpio_control()
322 u32 bcma_chipco_gpio_intmask(struct bcma_drv_cc *cc, u32 mask, u32 value) in bcma_chipco_gpio_intmask()
334 u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask, u32 value) in bcma_chipco_gpio_polarity()
346 u32 bcma_chipco_gpio_pullup(struct bcma_drv_cc *cc, u32 mask, u32 value) in bcma_chipco_gpio_pullup()
[all …]
/drivers/pinctrl/
Dpinctrl-at91.c404 static void at91_mux_disable_interrupt(void __iomem *pio, unsigned mask) in at91_mux_disable_interrupt()
414 static void at91_mux_set_pullup(void __iomem *pio, unsigned mask, bool on) in at91_mux_set_pullup()
428 static void at91_mux_set_output(void __iomem *pio, unsigned int mask, in at91_mux_set_output()
440 static void at91_mux_set_multidrive(void __iomem *pio, unsigned mask, bool on) in at91_mux_set_multidrive()
445 static void at91_mux_set_A_periph(void __iomem *pio, unsigned mask) in at91_mux_set_A_periph()
450 static void at91_mux_set_B_periph(void __iomem *pio, unsigned mask) in at91_mux_set_B_periph()
455 static void at91_mux_pio3_set_A_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_A_periph()
464 static void at91_mux_pio3_set_B_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_B_periph()
472 static void at91_mux_pio3_set_C_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_C_periph()
478 static void at91_mux_pio3_set_D_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_D_periph()
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Dpinctrl-stmfx.c108 u32 mask = get_mask(offset); in stmfx_gpio_get() local
121 u32 mask = get_mask(offset); in stmfx_gpio_set() local
131 u32 mask = get_mask(offset); in stmfx_gpio_get_direction() local
152 u32 mask = get_mask(offset); in stmfx_gpio_direction_input() local
162 u32 mask = get_mask(offset); in stmfx_gpio_direction_output() local
173 u32 pupd, mask = get_mask(offset); in stmfx_pinconf_get_pupd() local
187 u32 mask = get_mask(offset); in stmfx_pinconf_set_pupd() local
196 u32 type, mask = get_mask(offset); in stmfx_pinconf_get_type() local
210 u32 mask = get_mask(offset); in stmfx_pinconf_set_type() local
426 u32 mask = get_mask(data->hwirq); in stmfx_pinctrl_irq_mask() local
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/drivers/ssb/
Ddriver_chipcommon.c33 u32 mask, u32 value) in chipco_write32_masked()
494 void ssb_chipco_irq_mask(struct ssb_chipcommon *cc, u32 mask, u32 value) in ssb_chipco_irq_mask()
499 u32 ssb_chipco_irq_status(struct ssb_chipcommon *cc, u32 mask) in ssb_chipco_irq_status()
504 u32 ssb_chipco_gpio_in(struct ssb_chipcommon *cc, u32 mask) in ssb_chipco_gpio_in()
509 u32 ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value) in ssb_chipco_gpio_out()
521 u32 ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value) in ssb_chipco_gpio_outen()
533 u32 ssb_chipco_gpio_control(struct ssb_chipcommon *cc, u32 mask, u32 value) in ssb_chipco_gpio_control()
546 u32 ssb_chipco_gpio_intmask(struct ssb_chipcommon *cc, u32 mask, u32 value) in ssb_chipco_gpio_intmask()
558 u32 ssb_chipco_gpio_polarity(struct ssb_chipcommon *cc, u32 mask, u32 value) in ssb_chipco_gpio_polarity()
570 u32 ssb_chipco_gpio_pullup(struct ssb_chipcommon *cc, u32 mask, u32 value) in ssb_chipco_gpio_pullup()
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Dembedded.c69 u32 ssb_gpio_in(struct ssb_bus *bus, u32 mask) in ssb_gpio_in()
87 u32 ssb_gpio_out(struct ssb_bus *bus, u32 mask, u32 value) in ssb_gpio_out()
105 u32 ssb_gpio_outen(struct ssb_bus *bus, u32 mask, u32 value) in ssb_gpio_outen()
123 u32 ssb_gpio_control(struct ssb_bus *bus, u32 mask, u32 value) in ssb_gpio_control()
137 u32 ssb_gpio_intmask(struct ssb_bus *bus, u32 mask, u32 value) in ssb_gpio_intmask()
155 u32 ssb_gpio_polarity(struct ssb_bus *bus, u32 mask, u32 value) in ssb_gpio_polarity()
Ddriver_extif.c31 u32 mask, u32 value) in extif_write32_masked()
148 u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask) in ssb_extif_gpio_in()
153 u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value) in ssb_extif_gpio_out()
166 u32 ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value) in ssb_extif_gpio_outen()
179 u32 ssb_extif_gpio_polarity(struct ssb_extif *extif, u32 mask, u32 value) in ssb_extif_gpio_polarity()
191 u32 ssb_extif_gpio_intmask(struct ssb_extif *extif, u32 mask, u32 value) in ssb_extif_gpio_intmask()
/drivers/video/fbdev/
Dc2p_core.h23 unsigned int shift, u32 mask) in _transp()
62 u32 mask = get_mask(n); in transp8() local
104 u32 mask = get_mask(n); in transp4() local
131 u32 mask = get_mask(n); in transp4x() local
150 static inline u32 comp(u32 a, u32 b, u32 mask) in comp()
/drivers/media/pci/ivtv/
Divtv-gpio.c149 u16 mask, data; in subdev_s_clock_freq() local
172 u16 mask; in subdev_g_tuner() local
186 u16 mask, data; in subdev_s_tuner() local
213 u16 mask, data; in subdev_s_radio() local
226 u16 mask, data; in subdev_s_audio_routing() local
252 u16 mask, data; in subdev_s_ctrl() local
282 u16 mask, data; in subdev_s_video_routing() local
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu_helper.h176 #define PHM_WAIT_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, index, value, mask) \ argument
180 #define PHM_WAIT_INDIRECT_REGISTER(hwmgr, port, reg, value, mask) \ argument
187 #define PHM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, index, value, mask) \ argument
191 #define PHM_WAIT_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, value, mask) \ argument
201 port, index, value, mask) \ argument
205 #define PHM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, value, mask) \ argument
215 port, index, value, mask) \ argument
219 #define PHM_WAIT_VFPF_INDIRECT_REGISTER(hwmgr, port, reg, value, mask) \ argument
228 index, value, mask) \ argument
232 #define PHM_WAIT_REGISTER_UNEQUAL(hwmgr, reg, value, mask) \ argument
/drivers/net/phy/
Dphy-core.c289 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, bool exact) in phy_lookup_setting()
321 unsigned long *mask) in phy_speeds()
670 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) in phy_modify_changed()
693 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) in __phy_modify()
714 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) in phy_modify()
740 u16 mask, u16 set) in __phy_modify_mmd_changed()
773 u16 mask, u16 set) in phy_modify_mmd_changed()
798 u16 mask, u16 set) in __phy_modify_mmd()
821 u16 mask, u16 set) in phy_modify_mmd()
984 u16 mask, u16 set) in phy_modify_paged_changed()
[all …]
/drivers/gpio/
Dgpio-mmio.c149 static int bgpio_get_set_multiple(struct gpio_chip *gc, unsigned long *mask, in bgpio_get_set_multiple()
177 static int bgpio_get_multiple(struct gpio_chip *gc, unsigned long *mask, in bgpio_get_multiple()
189 static int bgpio_get_multiple_be(struct gpio_chip *gc, unsigned long *mask, in bgpio_get_multiple_be()
222 unsigned long mask = bgpio_line2mask(gc, gpio); in bgpio_set() local
240 unsigned long mask = bgpio_line2mask(gc, gpio); in bgpio_set_with_clear() local
250 unsigned long mask = bgpio_line2mask(gc, gpio); in bgpio_set_set() local
266 unsigned long *mask, unsigned long *bits, in bgpio_multiple_get_masks()
284 unsigned long *mask, in bgpio_set_multiple_single_reg()
303 static void bgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, in bgpio_set_multiple()
309 static void bgpio_set_multiple_set(struct gpio_chip *gc, unsigned long *mask, in bgpio_set_multiple_set()
[all …]
Dgpio-it87.c128 static inline void superio_set_mask(int mask, int reg) in superio_set_mask()
137 static inline void superio_clear_mask(int mask, int reg) in superio_clear_mask()
148 u8 mask, group; in it87_gpio_request() local
182 u8 mask; in it87_gpio_get() local
193 u8 mask, group; in it87_gpio_direction_in() local
219 u8 mask, curr_vals; in it87_gpio_set() local
236 u8 mask, group; in it87_gpio_direction_out() local
Dgpio-ath79.c56 struct ath79_gpio_ctrl *ctrl, unsigned reg, u32 mask, u32 bits) in ath79_gpio_update_bits()
72 u32 mask = BIT(irqd_to_hwirq(data)); in ath79_gpio_irq_unmask() local
84 u32 mask = BIT(irqd_to_hwirq(data)); in ath79_gpio_irq_mask() local
96 u32 mask = BIT(irqd_to_hwirq(data)); in ath79_gpio_irq_enable() local
108 u32 mask = BIT(irqd_to_hwirq(data)); in ath79_gpio_irq_disable() local
121 u32 mask = BIT(irqd_to_hwirq(data)); in ath79_gpio_irq_set_type() local
Dgpio-uniphier.c52 unsigned int *bank, u32 *mask) in uniphier_gpio_get_bank_and_mask()
59 unsigned int reg, u32 mask, u32 val) in uniphier_gpio_reg_update()
73 unsigned int reg, u32 mask, u32 val) in uniphier_gpio_bank_write()
89 u32 mask; in uniphier_gpio_offset_write() local
101 u32 mask; in uniphier_gpio_offset_read() local
147 unsigned long *mask, unsigned long *bits) in uniphier_gpio_set_multiple()
182 u32 mask = BIT(irqd_to_hwirq(data)); in uniphier_gpio_irq_mask() local
192 u32 mask = BIT(irqd_to_hwirq(data)); in uniphier_gpio_irq_unmask() local
202 u32 mask = BIT(irqd_to_hwirq(data)); in uniphier_gpio_irq_set_type() local
Dgpio-stmpe.c46 u8 mask = BIT(offset % 8); in stmpe_gpio_get() local
62 u8 mask = BIT(offset % 8); in stmpe_gpio_set() local
80 u8 mask = BIT(offset % 8); in stmpe_gpio_get_direction() local
99 u8 mask = BIT(offset % 8); in stmpe_gpio_direction_output() local
112 u8 mask = BIT(offset % 8); in stmpe_gpio_direction_input() local
146 int mask = BIT(offset % 8); in stmpe_gpio_irq_set_type() local
234 int mask = BIT(offset % 8); in stmpe_gpio_irq_mask() local
246 int mask = BIT(offset % 8); in stmpe_gpio_irq_unmask() local
262 u8 mask = BIT(offset % 8); in stmpe_dbg_show_one() local
/drivers/net/ethernet/microchip/vcap/
Dvcap_api_client.h25 u8 mask; member
30 u32 mask; member
35 u8 mask[6]; member
40 u8 mask[7]; member
45 u8 mask[8]; member
50 u8 mask[9]; member
55 u8 mask[14]; member
60 u8 mask[16]; member
/drivers/net/ethernet/intel/ixgbe/
Dixgbe_model.h21 union ixgbe_atr_input *mask; member
29 union ixgbe_atr_input *mask, in ixgbe_mat_prgm_sip()
38 union ixgbe_atr_input *mask, in ixgbe_mat_prgm_dip()
55 union ixgbe_atr_input *mask, in ixgbe_mat_prgm_ports()
86 u32 mask; member
/drivers/gpu/drm/amd/display/dmub/src/
Ddmub_reg.c31 uint32_t mask; member
36 uint32_t value, uint32_t mask, uint8_t shift) in set_reg_field_value_masks()
48 uint32_t shift, mask, field_value; in set_reg_field_values() local
66 static inline uint32_t get_reg_field_value_ex(uint32_t reg_value, uint32_t mask, in get_reg_field_value_ex()
105 uint32_t mask, uint32_t *field_value) in dmub_reg_get()
/drivers/gpu/drm/i915/gt/
Dintel_gt_pm_irq.c17 u32 mask = gt->pm_imr; in write_pm_imr() local
52 void gen6_gt_pm_unmask_irq(struct intel_gt *gt, u32 mask) in gen6_gt_pm_unmask_irq()
57 void gen6_gt_pm_mask_irq(struct intel_gt *gt, u32 mask) in gen6_gt_pm_mask_irq()
78 u32 mask = gt->pm_ier; in write_pm_ier() local

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