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| /Documentation/translations/zh_CN/filesystems/ |
| D | debugfs.rst | 41 struct dentry *debugfs_create_dir(const char *name, struct dentry *parent);
52 struct dentry *parent, void *data,
63 struct dentry *parent, void *data,
73 struct dentry *parent, u8 *value);
75 struct dentry *parent, u16 *value);
77 struct dentry *parent, u32 *value);
79 struct dentry *parent, u64 *value);
86 struct dentry *parent, u8 *value);
88 struct dentry *parent, u16 *value);
90 struct dentry *parent, u32 *value);
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| /Documentation/translations/zh_TW/filesystems/ |
| D | debugfs.rst | 43 struct dentry *debugfs_create_dir(const char *name, struct dentry *parent);
54 struct dentry *parent, void *data,
65 struct dentry *parent, void *data,
75 struct dentry *parent, u8 *value);
77 struct dentry *parent, u16 *value);
79 struct dentry *parent, u32 *value);
81 struct dentry *parent, u64 *value);
88 struct dentry *parent, u8 *value);
90 struct dentry *parent, u16 *value);
92 struct dentry *parent, u32 *value);
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| /Documentation/devicetree/bindings/edac/ |
| D | socfpga-eccmgr.txt | 89 - altr,ecc-parent : phandle to parent Ethernet node.
97 - altr,ecc-parent : phandle to parent NAND node.
105 - altr,ecc-parent : phandle to parent DMA node.
113 - altr,ecc-parent : phandle to parent USB node.
121 - altr,ecc-parent : phandle to parent QSPI node.
129 - altr,ecc-parent : phandle to parent SD/MMC node.
164 altr,ecc-parent = <&gmac0>;
172 altr,ecc-parent = <&gmac0>;
180 altr,ecc-parent = <&nand>;
188 altr,ecc-parent = <&nand>;
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| /Documentation/i2c/ |
| D | i2c-topology.rst | 23 each adapter has a parent adapter (except the root adapter) and zero or
25 I2C transfers, and all adapters with a parent are part of an "i2c-mux"
40 mux-locked or parent-locked muxes.
46 Mux-locked muxes does not lock the entire parent adapter during the
47 full select-transfer-deselect transaction, only the muxes on the parent
50 their tasks. Since the parent adapter is not fully locked during the
72 2. M1 locks muxes on its parent (the root adapter in this case).
75 These transfers are normal I2C transfers that locks the parent
77 5. M1 feeds the I2C transfer from step 1 to its parent adapter as a
78 normal I2C transfer that locks the parent adapter.
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| /Documentation/admin-guide/cgroup-v1/ |
| D | pids.rst | 34 pids.current tracks all child cgroup hierarchies, so parent/pids.current is a
35 superset of parent/child/pids.current.
51 # mkdir -p /sys/fs/cgroup/pids/parent/child
52 # echo 2 > /sys/fs/cgroup/pids/parent/pids.max
53 # echo $$ > /sys/fs/cgroup/pids/parent/cgroup.procs
54 # cat /sys/fs/cgroup/pids/parent/pids.current
61 # cat /sys/fs/cgroup/pids/parent/pids.current
69 parent's)::
71 # echo $$ > /sys/fs/cgroup/pids/parent/child/cgroup.procs
72 # cat /sys/fs/cgroup/pids/parent/pids.current
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| /Documentation/filesystems/ |
| D | debugfs.rst | 35 struct dentry *debugfs_create_dir(const char *name, struct dentry *parent);
38 indicated parent directory. If parent is NULL, the directory will be
49 struct dentry *parent, void *data,
53 permissions the file should have, parent indicates the directory which
66 struct dentry *parent, void *data,
79 struct dentry *parent, u8 *value);
81 struct dentry *parent, u16 *value);
83 struct dentry *parent, u32 *value);
85 struct dentry *parent, u64 *value);
93 struct dentry *parent, u8 *value);
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| D | directory-locking.rst | 22 3) object removal. Locking rules: caller locks parent, finds victim,
26 the parent and finds source and target. Then we decide which of the
38 * lock parent
50 the other, lock the parent of source first.
52 * if old parent is equal to or is a descendent of target
54 * if new parent is equal to or is a descendent of source
78 attempts to acquire lock on B, A will remain the parent of B until we
80 the parent of object and it would have to lock the parent).
130 Since the only new (parent, child) pair added by rename() is (new parent,
133 rename() responsible for that would be holding filesystem lock and new parent
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | interrupts.txt | 16 interrupt-parent = <&intc1>;
19 The "interrupt-parent" property is used to specify the controller to which
22 interrupt client node or in any of its parent nodes. Interrupts listed in the
23 "interrupts" property are always in reference to the node's interrupt parent.
26 to reference multiple interrupt parents or a different interrupt parent than
27 the inherited one. Each entry in this property contains both the parent phandle
63 interrupt-parent = <&vic>;
85 interrupt-parent = <&gpio>;
101 interrupt-parent = <&gpioext>;
112 3) Interrupt wakeup parent
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| D | fsl,ls-scfg-msi.txt | 14 - interrupts: an interrupt to the parent interrupt controller.
17 is hooked to a parent interrupt controller: e.g: ARM GIC for ARM-based
18 platforms. If interrupt-parent is not provided, the default parent interrupt
20 Each PCIe node needs to have property msi-parent that points to
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| D | marvell,icu.txt | 39 - msi-parent: Should point to the GICP controller, the GIC extension
57 msi-parent = <&gicp>;
65 msi-parent = <&sei>;
70 interrupt-parent = <&icu_nsr>;
75 interrupt-parent = <&icu_sei>;
81 interrupt-parent = <&icu_nsr>;
106 msi-parent = <&gicp>;
110 interrupt-parent = <&icu>;
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| D | brcm,bcm6345-l1-intc.txt | 32 - interrupts: specifies the interrupt line(s) in the interrupt-parent controller
33 node; valid values depend on the type of parent interrupt controller
35 If multiple reg ranges and interrupt-parent entries are present on an SMP
38 reg range and one interrupt-parent is needed.
53 interrupt-parent = <&cpu_intc>;
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| D | abilis,tb10x-ictl.txt | 17 the interrupt controller in the parent controller's notation. Interrupts
18 are mapped one-to-one to parent interrupts.
23 intc: interrupt-controller { /* Parent interrupt controller */
34 interrupt-parent = <&intc>;
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| /Documentation/livepatch/ |
| D | shadow-vars.rst | 7 allocated separately from parent data structures, which are left
12 associates pointers to parent objects and a numeric identifier of the
15 specifically, the parent pointer serves as the hashtable key while the
17 variables may attach to the same parent object, but their numeric
34 - obj - pointer to parent object
107 Matching parent's lifecycle
110 If parent data structures are frequently created and destroyed, it may
112 allocation and release functions. In this case, the parent data
115 part of the parent's initialization and should be completed before the
116 parent "goes live" (ie, any shadow variable get-API requests are made
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| /Documentation/networking/devlink/ |
| D | ice.rst | 354 pci/0000:4b:00.0/node_25: type node parent node_24
355 pci/0000:4b:00.0/node_24: type node parent node_0
356 pci/0000:4b:00.0/node_32: type node parent node_31
357 pci/0000:4b:00.0/node_31: type node parent node_30
358 pci/0000:4b:00.0/node_30: type node parent node_16
359 pci/0000:4b:00.0/node_19: type node parent node_18
360 pci/0000:4b:00.0/node_18: type node parent node_17
361 pci/0000:4b:00.0/node_17: type node parent node_16
362 pci/0000:4b:00.0/node_14: type node parent node_5
363 pci/0000:4b:00.0/node_5: type node parent node_3
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| /Documentation/devicetree/bindings/net/ |
| D | mdio-mux-gpio.yaml | 45 mdio-parent-bus = <&smi1>;
60 interrupt-parent = <&gpio>;
69 interrupt-parent = <&gpio>;
78 interrupt-parent = <&gpio>;
87 interrupt-parent = <&gpio>;
103 interrupt-parent = <&gpio>;
112 interrupt-parent = <&gpio>;
121 interrupt-parent = <&gpio>;
130 interrupt-parent = <&gpio>;
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| /Documentation/devicetree/bindings/interconnect/ |
| D | samsung,exynos-bus.yaml | 27 - parent bus device
30 Basically, parent and passive bus device share the same power line. The
31 parent bus device can only change the voltage of shared power line and the
32 rest bus devices (passive bus device) depend on the decision of the parent
34 Only one block should be parent device and then the rest blocks should depend
35 on the parent device as passive device.
37 VDD_xxx |--- A block (parent)
51 VDD_INT |--- LEFTBUS (parent device)
81 |Mode |*parent|passive |passive|passive|passive|| |
93 VDD_INT |--- DMC (parent device, Dynamic Memory Controller)
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| /Documentation/devicetree/bindings/serial/ |
| D | nxp,sc16is7xx.txt | 35 interrupt-parent = <&gpio3>;
45 interrupt-parent = <&gpio3>;
56 interrupt-parent = <&gpio3>;
72 - interrupts: Specifies the interrupt source of the parent interrupt
74 parent interrupt controller.
94 interrupt-parent = <&gpio3>;
104 interrupt-parent = <&gpio3>;
115 interrupt-parent = <&gpio3>;
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| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-mux-gpmux.yaml | 38 i2c-parent:
52 Explicitly allow unrelated I2C transactions on the parent I2C adapter at
60 to the same parent adapter that this multiplexer is connected to are blocked
63 If mux-locked is not present, the multiplexer is assumed to be parent-locked.
64 This means that no unrelated I2C transactions are allowed on the parent I2C
66 The properties of mux-locked and parent-locked multiplexers are discussed
71 - i2c-parent
90 i2c-parent = <&i2c1>;
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| /Documentation/devicetree/bindings/sound/ |
| D | ti,j721e-cpb-ivi-audio.yaml | 23 In order to support 48KHz and 44.1KHz family of sampling rates the parent clock
76 - description: Parent for CPB_McASP auxclk (for 48KHz)
77 - description: Parent for CPB_McASP auxclk (for 44.1KHz)
79 - description: Parent for CPB_SCKI clock (for 48KHz)
80 - description: Parent for CPB_SCKI clock (for 44.1KHz)
82 - description: Parent for IVI_McASP auxclk (for 48KHz)
83 - description: Parent for IVI_McASP auxclk (for 44.1KHz)
85 - description: Parent for IVI_SCKI clock (for 48KHz)
86 - description: Parent for IVI_SCKI clock (for 44.1KHz)
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| D | ti,j721e-cpb-audio.yaml | 18 In order to support 48KHz and 44.1KHz family of sampling rates the parent
85 - description: Parent for CPB_McASP auxclk (for 48KHz)
86 - description: Parent for CPB_McASP auxclk (for 44.1KHz)
88 - description: Parent for CPB_SCKI clock (for 48KHz)
89 - description: Parent for CPB_SCKI clock (for 44.1KHz)
111 - description: Parent for CPB_McASP auxclk (for 48KHz)
113 - description: Parent for CPB_SCKI clock (for 48KHz)
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| /Documentation/devicetree/bindings/clock/ |
| D | samsung,exynos-audss-clock.yaml | 31 Fixed rate PLL reference clock, parent of mout_audss. "fin_pll" is
34 Input PLL to the AudioSS block, parent of mout_audss. "fout_epll" is
37 Audio bus clock, parent of mout_i2s. "sclk_audio0" is used if not
40 PCM clock, parent of sclk_pcm. "sclk_pcm0" is used if not specified.
42 External i2s clock, parent of mout_i2s. "cdclk0" is used if not
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| /Documentation/devicetree/bindings/pci/ |
| D | altera-pcie.txt | 11 - interrupts: specifies the interrupt source of the parent interrupt
13 on the parent interrupt controller.
24 - msi-parent: Link to the hardware entity that serves as the MSI controller
34 interrupt-parent = <&hps_0_arm_gic_0>;
40 msi-parent = <&msi_to_gic_gen_0>;
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| /Documentation/devicetree/bindings/clock/ti/ |
| D | mux.txt | 8 gate or adjust the parent rate via a divider or multiplier.
17 register value selected parent clock
26 register value selected clock parent
41 - clocks : link phandles of parent clocks
50 - ti,set-rate-parent : clk_set_rate is propagated to parent clock,
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| /Documentation/scheduler/ |
| D | sched-domains.rst | 6 hierarchy is built from these base domains via the ->parent pointer. ->parent
42 sched domains our CPU is on, starting from its base domain and going up the ->parent
45 the parent sched_domain (if it exists), and the parent of the parent and so
62 In SMP, the parent of the base domain will span all physical CPUs in the
63 node. Each group being a single physical CPU. Then with NUMA, the parent
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| /Documentation/devicetree/bindings/mux/ |
| D | reg-mux.yaml | 13 Define register bitfields to be used to control multiplexers. The parent
19 - reg-mux # parent device of mux controller is not syscon device
20 - mmio-mux # parent device of mux controller is syscon device
46 /* The parent device of mux controller is not a syscon device. */
61 mdio-parent-bus = <&emdio1>;
81 mdio-parent-bus = <&emdio2>;
99 /* The parent device of mux controller is syscon device. */
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