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Searched refs:feature_bit (Results 1 – 5 of 5) sorted by relevance

/arch/x86/include/asm/
Dcpufeature.h74 #define REQUIRED_MASK_BIT_SET(feature_bit) \ argument
75 ( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \
76 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 1, feature_bit) || \
77 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 2, feature_bit) || \
78 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 3, feature_bit) || \
79 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 4, feature_bit) || \
80 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 5, feature_bit) || \
81 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 6, feature_bit) || \
82 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 7, feature_bit) || \
83 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 8, feature_bit) || \
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/arch/s390/include/asm/
Duv.h410 static inline bool uv_has_feature(u8 feature_bit) in uv_has_feature() argument
412 if (feature_bit >= sizeof(uv_info.uv_feature_indications) * 8) in uv_has_feature()
414 return test_bit_inv(feature_bit, &uv_info.uv_feature_indications); in uv_has_feature()
/arch/x86/kvm/
Dreverse_cpuid.h156 #define feature_bit(name) __feature_bit(X86_FEATURE_##name) macro
Dcpuid.c41 int feature_bit = 0; in xstate_required_size() local
48 cpuid_count(0xD, feature_bit, &eax, &ebx, &ecx, &edx); in xstate_required_size()
58 feature_bit++; in xstate_required_size()
64 #define F feature_bit
/arch/x86/kvm/vmx/
Dvmx.c2750 if (!(cpuid_ecx(1) & feature_bit(VMX))) { in __kvm_is_vmx_supported()
7676 cr4_fixed1_update(X86_CR4_VME, edx, feature_bit(VME)); in nested_vmx_cr_fixed1_bits_update()
7677 cr4_fixed1_update(X86_CR4_PVI, edx, feature_bit(VME)); in nested_vmx_cr_fixed1_bits_update()
7678 cr4_fixed1_update(X86_CR4_TSD, edx, feature_bit(TSC)); in nested_vmx_cr_fixed1_bits_update()
7679 cr4_fixed1_update(X86_CR4_DE, edx, feature_bit(DE)); in nested_vmx_cr_fixed1_bits_update()
7680 cr4_fixed1_update(X86_CR4_PSE, edx, feature_bit(PSE)); in nested_vmx_cr_fixed1_bits_update()
7681 cr4_fixed1_update(X86_CR4_PAE, edx, feature_bit(PAE)); in nested_vmx_cr_fixed1_bits_update()
7682 cr4_fixed1_update(X86_CR4_MCE, edx, feature_bit(MCE)); in nested_vmx_cr_fixed1_bits_update()
7683 cr4_fixed1_update(X86_CR4_PGE, edx, feature_bit(PGE)); in nested_vmx_cr_fixed1_bits_update()
7684 cr4_fixed1_update(X86_CR4_OSFXSR, edx, feature_bit(FXSR)); in nested_vmx_cr_fixed1_bits_update()
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