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Searched refs:MDP5_SPLIT_DPL_UPPER_INTF1_SW_TRG_MUX (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/msm/disp/mdp5/
Dmdp5_cmd_encoder.c183 data |= MDP5_SPLIT_DPL_UPPER_INTF1_SW_TRG_MUX; in mdp5_cmd_encoder_set_split_display()
Dmdp5.xml.h351 #define MDP5_SPLIT_DPL_UPPER_INTF1_SW_TRG_MUX 0x00000010 macro