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Searched refs:V3D_CORE_WRITE (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/v3d/
Dv3d_irq.c71 V3D_CORE_WRITE(0, V3D_PTB_BPOA, bo->node.start << PAGE_SHIFT); in v3d_overflow_mem_work()
72 V3D_CORE_WRITE(0, V3D_PTB_BPOS, obj->size); in v3d_overflow_mem_work()
88 V3D_CORE_WRITE(0, V3D_CTL_INT_CLR, intsts); in v3d_irq()
214 V3D_CORE_WRITE(core, V3D_CTL_INT_CLR, V3D_CORE_IRQS); in v3d_irq_init()
259 V3D_CORE_WRITE(core, V3D_CTL_INT_MSK_SET, ~V3D_CORE_IRQS); in v3d_irq_enable()
260 V3D_CORE_WRITE(core, V3D_CTL_INT_MSK_CLR, V3D_CORE_IRQS); in v3d_irq_enable()
274 V3D_CORE_WRITE(core, V3D_CTL_INT_MSK_SET, ~0); in v3d_irq_disable()
279 V3D_CORE_WRITE(core, V3D_CTL_INT_CLR, V3D_CORE_IRQS); in v3d_irq_disable()
Dv3d_sched.c94 V3D_CORE_WRITE(0, V3D_PTB_BPOS, 0); in v3d_bin_job_run()
116 V3D_CORE_WRITE(0, V3D_CLE_CT0QMA, job->qma); in v3d_bin_job_run()
117 V3D_CORE_WRITE(0, V3D_CLE_CT0QMS, job->qms); in v3d_bin_job_run()
120 V3D_CORE_WRITE(0, V3D_CLE_CT0QTS, in v3d_bin_job_run()
124 V3D_CORE_WRITE(0, V3D_CLE_CT0QBA, job->start); in v3d_bin_job_run()
125 V3D_CORE_WRITE(0, V3D_CLE_CT0QEA, job->end); in v3d_bin_job_run()
168 V3D_CORE_WRITE(0, V3D_CLE_CT1QBA, job->start); in v3d_render_job_run()
169 V3D_CORE_WRITE(0, V3D_CLE_CT1QEA, job->end); in v3d_render_job_run()
237 V3D_CORE_WRITE(0, V3D_CSD_QUEUED_CFG0 + 4 * i, job->args.cfg[i]); in v3d_csd_job_run()
239 V3D_CORE_WRITE(0, V3D_CSD_QUEUED_CFG0, job->args.cfg[0]); in v3d_csd_job_run()
Dv3d_debugfs.c215 V3D_CORE_WRITE(core, V3D_V4_PCTR_0_SRC_0_3, in v3d_measure_clock()
218 V3D_CORE_WRITE(core, V3D_V4_PCTR_0_CLR, 1); in v3d_measure_clock()
219 V3D_CORE_WRITE(core, V3D_V4_PCTR_0_EN, 1); in v3d_measure_clock()
221 V3D_CORE_WRITE(core, V3D_V3_PCTR_0_PCTRS0, in v3d_measure_clock()
223 V3D_CORE_WRITE(core, V3D_V3_PCTR_0_CLR, 1); in v3d_measure_clock()
224 V3D_CORE_WRITE(core, V3D_V3_PCTR_0_EN, in v3d_measure_clock()
Dv3d_perfmon.c51 V3D_CORE_WRITE(0, V3D_V4_PCTR_0_SRC_X(source), channel); in v3d_perfmon_start()
54 V3D_CORE_WRITE(0, V3D_V4_PCTR_0_CLR, mask); in v3d_perfmon_start()
55 V3D_CORE_WRITE(0, V3D_PCTR_0_OVERFLOW, mask); in v3d_perfmon_start()
56 V3D_CORE_WRITE(0, V3D_V4_PCTR_0_EN, mask); in v3d_perfmon_start()
79 V3D_CORE_WRITE(0, V3D_V4_PCTR_0_EN, 0); in v3d_perfmon_stop()
Dv3d_gem.c31 V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT); in v3d_init_core()
36 V3D_CORE_WRITE(core, V3D_CTL_L2TFLSTA, 0); in v3d_init_core()
37 V3D_CORE_WRITE(core, V3D_CTL_L2TFLEND, ~0); in v3d_init_core()
50 V3D_CORE_WRITE(core, V3D_GMP_CFG, V3D_GMP_CFG_STOP_REQ); in v3d_idle_axi()
159 V3D_CORE_WRITE(core, V3D_CTL_L2CACTL, in v3d_invalidate_l2c()
176 V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, in v3d_flush_l2t()
198 V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, V3D_L2TCACTL_TMUWCF); in v3d_clean_caches()
205 V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, in v3d_clean_caches()
223 V3D_CORE_WRITE(core, V3D_CTL_SLCACTL, in v3d_invalidate_slices()
Dv3d_drv.h213 #define V3D_CORE_WRITE(core, offset, val) writel(val, v3d->core_regs[core] + offset) macro