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Searched refs:oq_no (Results 1 – 9 of 9) sorted by relevance

/drivers/net/ethernet/marvell/octeon_ep/
Doctep_cn9k_pf.c309 static void octep_setup_oq_regs_cn93_pf(struct octep_device *oct, int oq_no) in octep_setup_oq_regs_cn93_pf() argument
314 struct octep_oq *oq = oct->oq[oq_no]; in octep_setup_oq_regs_cn93_pf()
316 oq_no += CFG_GET_PORTS_PF_SRN(oct->conf); in octep_setup_oq_regs_cn93_pf()
317 reg_val = octep_read_csr64(oct, CN93_SDP_R_OUT_CONTROL(oq_no)); in octep_setup_oq_regs_cn93_pf()
322 reg_val = octep_read_csr64(oct, CN93_SDP_R_OUT_CONTROL(oq_no)); in octep_setup_oq_regs_cn93_pf()
337 octep_write_csr64(oct, CN93_SDP_R_OUT_CONTROL(oq_no), reg_val); in octep_setup_oq_regs_cn93_pf()
338 octep_write_csr64(oct, CN93_SDP_R_OUT_SLIST_BADDR(oq_no), in octep_setup_oq_regs_cn93_pf()
340 octep_write_csr64(oct, CN93_SDP_R_OUT_SLIST_RSIZE(oq_no), in octep_setup_oq_regs_cn93_pf()
343 oq_ctl = octep_read_csr64(oct, CN93_SDP_R_OUT_CONTROL(oq_no)); in octep_setup_oq_regs_cn93_pf()
346 octep_write_csr64(oct, CN93_SDP_R_OUT_CONTROL(oq_no), oq_ctl); in octep_setup_oq_regs_cn93_pf()
[all …]
/drivers/net/ethernet/cavium/liquidio/
Dcn66xx_device.c301 void lio_cn6xxx_setup_oq_regs(struct octeon_device *oct, u32 oq_no) in lio_cn6xxx_setup_oq_regs() argument
304 struct octeon_droq *droq = oct->droq[oq_no]; in lio_cn6xxx_setup_oq_regs()
306 octeon_write_csr64(oct, CN6XXX_SLI_OQ_BASE_ADDR64(oq_no), in lio_cn6xxx_setup_oq_regs()
308 octeon_write_csr(oct, CN6XXX_SLI_OQ_SIZE(oq_no), droq->max_count); in lio_cn6xxx_setup_oq_regs()
310 octeon_write_csr(oct, CN6XXX_SLI_OQ_BUFF_INFO_SIZE(oq_no), in lio_cn6xxx_setup_oq_regs()
315 oct->mmio[0].hw_addr + CN6XXX_SLI_OQ_PKTS_SENT(oq_no); in lio_cn6xxx_setup_oq_regs()
317 oct->mmio[0].hw_addr + CN6XXX_SLI_OQ_PKTS_CREDIT(oq_no); in lio_cn6xxx_setup_oq_regs()
321 intr |= (1 << oq_no); in lio_cn6xxx_setup_oq_regs()
326 intr |= (1 << oq_no); in lio_cn6xxx_setup_oq_regs()
509 int oq_no; in lio_cn6xxx_process_droq_intr_regs() local
[all …]
Dcn23xx_vf_device.c245 static void cn23xx_setup_vf_oq_regs(struct octeon_device *oct, u32 oq_no) in cn23xx_setup_vf_oq_regs() argument
247 struct octeon_droq *droq = oct->droq[oq_no]; in cn23xx_setup_vf_oq_regs()
249 octeon_write_csr64(oct, CN23XX_VF_SLI_OQ_BASE_ADDR64(oq_no), in cn23xx_setup_vf_oq_regs()
251 octeon_write_csr(oct, CN23XX_VF_SLI_OQ_SIZE(oq_no), droq->max_count); in cn23xx_setup_vf_oq_regs()
253 octeon_write_csr(oct, CN23XX_VF_SLI_OQ_BUFF_INFO_SIZE(oq_no), in cn23xx_setup_vf_oq_regs()
258 (u8 *)oct->mmio[0].hw_addr + CN23XX_VF_SLI_OQ_PKTS_SENT(oq_no); in cn23xx_setup_vf_oq_regs()
260 (u8 *)oct->mmio[0].hw_addr + CN23XX_VF_SLI_OQ_PKTS_CREDIT(oq_no); in cn23xx_setup_vf_oq_regs()
Dcn23xx_pf_device.c628 static void cn23xx_setup_oq_regs(struct octeon_device *oct, u32 oq_no) in cn23xx_setup_oq_regs() argument
631 struct octeon_droq *droq = oct->droq[oq_no]; in cn23xx_setup_oq_regs()
636 oq_no += oct->sriov_info.pf_srn; in cn23xx_setup_oq_regs()
638 octeon_write_csr64(oct, CN23XX_SLI_OQ_BASE_ADDR64(oq_no), in cn23xx_setup_oq_regs()
640 octeon_write_csr(oct, CN23XX_SLI_OQ_SIZE(oq_no), droq->max_count); in cn23xx_setup_oq_regs()
642 octeon_write_csr(oct, CN23XX_SLI_OQ_BUFF_INFO_SIZE(oq_no), in cn23xx_setup_oq_regs()
647 (u8 *)oct->mmio[0].hw_addr + CN23XX_SLI_OQ_PKTS_SENT(oq_no); in cn23xx_setup_oq_regs()
649 (u8 *)oct->mmio[0].hw_addr + CN23XX_SLI_OQ_PKTS_CREDIT(oq_no); in cn23xx_setup_oq_regs()
655 octeon_read_csr(oct, CN23XX_SLI_OQ_PKT_CONTROL(oq_no)); in cn23xx_setup_oq_regs()
657 octeon_write_csr(oct, CN23XX_SLI_OQ_PKT_CONTROL(oq_no), in cn23xx_setup_oq_regs()
[all …]
Dcn66xx_device.h77 void lio_cn6xxx_setup_oq_regs(struct octeon_device *oct, u32 oq_no);
Dlio_core.c963 u64 oq_no; in liquidio_schedule_droq_pkt_handlers() local
966 for (oq_no = 0; oq_no < MAX_OCTEON_OUTPUT_QUEUES(oct); in liquidio_schedule_droq_pkt_handlers()
967 oq_no++) { in liquidio_schedule_droq_pkt_handlers()
968 if (!(oct->droq_intr & BIT_ULL(oq_no))) in liquidio_schedule_droq_pkt_handlers()
971 droq = oct->droq[oq_no]; in liquidio_schedule_droq_pkt_handlers()
975 oct_priv->napi_mask |= BIT_ULL(oq_no); in liquidio_schedule_droq_pkt_handlers()
Docteon_device.c921 u32 oq_no = 0; in octeon_setup_output_queues() local
943 if (octeon_init_droq(oct, oq_no, num_descs, desc_size, NULL)) { in octeon_setup_output_queues()
944 vfree(oct->droq[oq_no]); in octeon_setup_output_queues()
945 oct->droq[oq_no] = NULL; in octeon_setup_output_queues()
Dlio_vf_main.c1180 int i, iq_no, oq_no; in liquidio_get_stats64() local
1204 oq_no = lio->linfo.rxpciq[i].s.q_no; in liquidio_get_stats64()
1205 oq_stats = &oct->droq[oq_no]->stats; in liquidio_get_stats64()
Dlio_main.c2051 int i, iq_no, oq_no; in liquidio_get_stats64() local
2075 oq_no = lio->linfo.rxpciq[i].s.q_no; in liquidio_get_stats64()
2076 oq_stats = &oct->droq[oq_no]->stats; in liquidio_get_stats64()