| /drivers/mailbox/ |
| D | platform_mhu.c | 37 void __iomem *rx_reg; member
53 val = readl_relaxed(mlink->rx_reg + INTR_STAT_OFS); in platform_mhu_rx_interrupt()
59 writel_relaxed(val, mlink->rx_reg + INTR_CLR_OFS); in platform_mhu_rx_interrupt()
141 mhu->mlink[i].rx_reg = mhu->base + platform_mhu_reg[i]; in platform_mhu_probe()
142 mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET; in platform_mhu_probe()
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| D | arm_mhu.c | 31 void __iomem *rx_reg; member
47 val = readl_relaxed(mlink->rx_reg + INTR_STAT_OFS); in mhu_rx_interrupt()
53 writel_relaxed(val, mlink->rx_reg + INTR_CLR_OFS); in mhu_rx_interrupt()
132 mhu->mlink[i].rx_reg = mhu->base + mhu_reg[i]; in mhu_probe()
133 mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET; in mhu_probe()
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| D | arm_mhu_db.c | 35 void __iomem *rx_reg; member
78 void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].rx_reg; in mhu_db_mbox_clear_irq()
100 void __iomem *base = mhu->mlink[pchan].rx_reg; in mhu_db_mbox_irq_to_channel()
314 mhu->mlink[i].rx_reg = mhu->base + mhu_reg[i]; in mhu_db_probe()
315 mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET; in mhu_db_probe()
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| /drivers/spi/ |
| D | spi-orion.c | 385 void __iomem *tx_reg, *rx_reg, *int_reg; in orion_spi_write_read_8bit() local
397 rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG); in orion_spi_write_read_8bit()
419 *(*rx_buf)++ = readl(rx_reg); in orion_spi_write_read_8bit()
434 void __iomem *tx_reg, *rx_reg, *int_reg; in orion_spi_write_read_16bit() local
444 rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG); in orion_spi_write_read_16bit()
461 put_unaligned(__le16_to_cpu(readl(rx_reg)), (*rx_buf)++); in orion_spi_write_read_16bit()
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| D | spi-omap2-mcspi.c | 696 void __iomem *rx_reg; in omap2_mcspi_txrx_pio() local
709 rx_reg = base + OMAP2_MCSPI_RX0; in omap2_mcspi_txrx_pio()
744 *rx++ = readl_relaxed(rx_reg); in omap2_mcspi_txrx_pio()
758 *rx++ = readl_relaxed(rx_reg); in omap2_mcspi_txrx_pio()
793 *rx++ = readl_relaxed(rx_reg); in omap2_mcspi_txrx_pio()
807 *rx++ = readl_relaxed(rx_reg); in omap2_mcspi_txrx_pio()
842 *rx++ = readl_relaxed(rx_reg); in omap2_mcspi_txrx_pio()
856 *rx++ = readl_relaxed(rx_reg); in omap2_mcspi_txrx_pio()
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| D | spi-topcliff-pch.c | 859 param->rx_reg = data->io_base_addr + PCH_SPDRR; in pch_spi_request_dma()
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| /drivers/net/ethernet/intel/ice/ |
| D | ice_base.c | 679 u32 rx_reg; in ice_vsi_ctrl_one_rx_ring() local
681 rx_reg = rd32(hw, QRX_CTRL(pf_q)); in ice_vsi_ctrl_one_rx_ring()
684 if (ena == !!(rx_reg & QRX_CTRL_QENA_STAT_M)) in ice_vsi_ctrl_one_rx_ring()
689 rx_reg |= QRX_CTRL_QENA_REQ_M; in ice_vsi_ctrl_one_rx_ring()
691 rx_reg &= ~QRX_CTRL_QENA_REQ_M; in ice_vsi_ctrl_one_rx_ring()
692 wr32(hw, QRX_CTRL(pf_q), rx_reg); in ice_vsi_ctrl_one_rx_ring()
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| D | ice_lib.c | 2179 u32 rx_reg; in ice_vsi_is_rx_queue_active() local
2183 rx_reg = rd32(hw, QRX_CTRL(pf_q)); in ice_vsi_is_rx_queue_active()
2184 if (rx_reg & QRX_CTRL_QENA_STAT_M) in ice_vsi_is_rx_queue_active()
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| /drivers/dma/ |
| D | txx9dmac.c | 845 desc->hwdesc.SAR = ds->rx_reg; in txx9dmac_prep_slave_sg()
854 desc->hwdesc32.SAR = ds->rx_reg; in txx9dmac_prep_slave_sg()
1011 (ds->tx_reg && ds->rx_reg) || (!ds->tx_reg && !ds->rx_reg)) in txx9dmac_alloc_chan_resources()
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| D | pch_dma.c | 586 reg = pd_slave->rx_reg; in pd_prep_slave_sg()
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| /drivers/net/phy/ |
| D | motorcomm.c | 795 u32 rx_reg, tx_reg; in ytphy_rgmii_clk_delay_config() local
799 rx_reg = ytphy_get_delay_reg_value(phydev, "rx-internal-delay-ps", in ytphy_rgmii_clk_delay_config()
812 val |= FIELD_PREP(YT8521_RC1R_RX_DELAY_MASK, rx_reg); in ytphy_rgmii_clk_delay_config()
819 val |= FIELD_PREP(YT8521_RC1R_RX_DELAY_MASK, rx_reg) | in ytphy_rgmii_clk_delay_config()
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| /drivers/net/ethernet/marvell/ |
| D | sky2.c | 900 u32 rx_reg; in sky2_mac_init() local
984 rx_reg = GMF_OPER_ON | GMF_RX_F_FL_ON; in sky2_mac_init()
987 rx_reg |= GMF_RX_OVER_ON; in sky2_mac_init()
989 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg); in sky2_mac_init()
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| /drivers/net/ethernet/intel/i40e/ |
| D | i40e_main.c | 4818 u32 rx_reg; in i40e_pf_rxq_wait() local
4821 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q)); in i40e_pf_rxq_wait()
4822 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) in i40e_pf_rxq_wait()
4846 u32 rx_reg; in i40e_control_rx_q() local
4850 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q)); in i40e_control_rx_q()
4851 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) == in i40e_control_rx_q()
4852 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1)) in i40e_control_rx_q()
4858 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) in i40e_control_rx_q()
4863 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK; in i40e_control_rx_q()
4865 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK; in i40e_control_rx_q()
[all …]
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| /drivers/tty/serial/ |
| D | pch_uart.c | 707 param->rx_reg = port->mapbase + UART_RX; in pch_request_dma()
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